10AX115S2F45E2LG vs 10AX115S1F45E1SG Comparación
Comparación detallada lado a lado de 10AX115S2F45E2LG por Altera y 10AX115S1F45E1SG por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | 10AX115S2F45E2LG | 10AX115S1F45E1SG |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $7.100,00 | $5.850,00 |
| Family | Arria 10 GX | Arria 10 GX |
| Logic Elements | 1,150,000 | — |
| Embedded Memory | 68,857,600 bits | 68,857,856 bits (approximately 53 Mbits) |
| User I/O Count | 624 | — |
| Process Technology | 20 nm | 20 nm TSMC |
| Core Voltage | 0.9 V | 0.9 V (with on-chip regulation) |
| Encapsulado | 1932-ball FCBGA | 1932-BBGA, FCBGA (F45) 45 mm |
| Tipo de montaje | Surface Mount | Surface Mount (BGA) |
| Speed Grade | -2 (industrial) | -1 (slower) |
| Temperature Grade | E2 (extended) | — |
| Transceivers | Up to 28.05 Gbps (per family datasheet) | Up to 12.5 Gbps (GX) |
| DSP Blocks | Hardened fixed/floating-point DSP blocks | [DATA_NEEDED: DSP block count] |
| Hard Memory Controllers | Yes (DDR4/QDRIV+ via soft IP) | — |
| PCIe Hard IP | PCIe Gen3/Gen4 capable | — |
| Configuration | Active Serial / Fast Passive Parallel | — |
| Estado RoHS | Compliant | Compliant |
| Nivel MSL | [DATA_NEEDED: MSL rating] | — |
| Logic Elements (LEs) | — | 1,150,000 |
| Adaptive Logic Modules (ALMs) | — | [DATA_NEEDED: ALM count] |
| Embedded Memory Blocks | — | M20K blocks |
| User I/O Pins | — | 624 |
| Hard IP | — | PCIe Gen3, DDR4 memory controllers |
| Ball Pitch | — | 1.0 mm |
| Temperatura de funcionamiento | — | -40C to +100C (industrial) |
| Lead-Free | — | Yes |