10AX115U4F45E3SG vs 10AX115U3F45E2SG Comparación
Comparación detallada lado a lado de 10AX115U4F45E3SG por Intel y 10AX115U3F45E2SG por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | 10AX115U4F45E3SG | 10AX115U3F45E2SG |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $5.200,00 | $5.800,00 |
| Series | Arria 10 GX | — |
| Family | Arria 10 | Arria 10 GX |
| Logic Elements | 1,150,000 | — |
| Embedded Memory | 68,857,856 bits | — |
| User I/O Count | 480 | — |
| Package Type | 1932-BBGA, FCBGA (F45) | — |
| Package Dimensions | 45 mm x 45 mm | — |
| Core Voltage (VCC) | 0.85 V / 0.9 V | — |
| Supply Voltage Nominal | 0.9 V | — |
| Process Node | 20 nm (TSMC) | 20 nm Tri-Gate (Intel) |
| Speed Grade | E3 | -2 (E2 commercial/extended) |
| Rango de temperatura de funcionamiento | 0C to 100C (TJ) | — |
| Transceivers | Up to 24 channels at 17.4 Gbps | — |
| Tipo de montaje | Surface Mount (BGA) | — |
| Estado RoHS | Compliant | — |
| Logic Elements (LE) | — | 1,150,000 |
| Adaptive Logic Modules (ALM) | — | 427,200 |
| Embedded Memory Bits | — | 68,857,856 (≈ 52.99 Mbit) |
| Number of Transceivers | — | [DATA_NEEDED: per-die transceiver count, F45 package variant] |
| Maximum Transceiver Data Rate | — | 17.4 Gbps |
| DSP Blocks | — | Variable-precision, hardened floating-point |
| Hard Memory Controllers | — | 2 (DDR4/DDR3/QDRII+/RLDRAM3) |
| Hard PCIe Gen3 IP Blocks | — | 2 × PCIe Gen3 (x8/x4/x2/x1) |
| Encapsulado | — | 1932-ball FCBGA (F45, 45×45 mm, 1.0 mm pitch) |
| Temperatura de funcionamiento | — | Industrial (junction -40 °C to +100 °C) – device grade U |
| Supply Voltage Core | — | [DATA_NEEDED: VCC/VCCP core voltage] |
| Configuration Method | — | FPGA configuration via serial/parallel flash, JTAG |
| RoHS Compliance | — | Compliant |
| Nivel MSL | — | [DATA_NEEDED: MSL rating per JEDEC J-STD-020] |