10CL080YF484I7G vs 10CL120YF484C8G Comparación
Comparación detallada lado a lado de 10CL080YF484I7G por Intel y 10CL120YF484C8G por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | 10CL080YF484I7G | 10CL120YF484C8G |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $71,95 | $71,10 |
| Family | Cyclone 10 LP | Cyclone® 10 LP |
| Logic Elements (LE) | 81,264 | 119,088 |
| Embedded Memory (Bits) | 2,810,880 | — |
| Maximum User I/Os | 289 | — |
| Embedded 18x18 Multipliers | 244 | — |
| PLLs | [DATA_NEEDED: PLL count] | — |
| Encapsulado | 484-ball FBGA (F484) | 484-FBGA (F484) |
| Ball Pitch | [DATA_NEEDED: ball pitch] | — |
| Core Voltage | 1.0 V / 1.2 V | — |
| Process Technology | 60 nm low-power CMOS | 60 nm TSMC |
| Temperatura de funcionamiento | -40C to +100C (industrial, -I7 grade) | Commercial (0°C to 85°C) - C suffix |
| Speed Grade | -I7 (industrial, mid-tier) | 8 |
| I/O Standards Supported | LVDS, LVTTL, LVCMOS, SSTL, RSDS, HSTL, PCI | — |
| Memory Controller Hard IP | DDR3, DDR2, LPDDR2 | — |
| Tipo de montaje | Surface Mount (FBGA) | Surface Mount (FBGA) |
| Estado RoHS | Compliant | Compliant |
| Nivel MSL | [DATA_NEEDED: MSL level] | 3 |
| Adaptive Logic Modules (ALM) | — | [DATA_NEEDED: ALM count] |
| Embedded Memory | — | 3,981,312 bits (M9K blocks) |
| Embedded Multipliers (18x18) | — | 66 |
| Maximum User I/O Pins | — | 277 |
| General-Purpose PLLs | — | 4 |
| Configuration Modes | — | AS, PS, FPP, JTAG |
| External Memory Support | — | DDR3, DDR2, LPDDR2 (via soft IP) |
| I/O Standards | — | LVDS, LVCMOS, SSTL, HSTL, PCI, LVTTL |
| Lead-Free | — | Yes |