2ED21844S06JXUMA1 vs 2ED21064S06JXUMA1 Comparación
Comparación detallada lado a lado de 2ED21844S06JXUMA1 por Infineon y 2ED21064S06JXUMA1 por Infineon. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Infineon
2ED21844S06JXUMA1 - 650V Half-Bridge Gate Driver 2.5A | Infineon
2ED21844S06JXUMA1 ✓ ActivoInfineon
2ED21064S06JXUMA1 - 650V 0.7A Half-Bridge Gate Driver | Infineon
2ED21064S06JXUMA1 ✓ ActivoComparación de especificaciones
| Parámetro | 2ED21844S06JXUMA1 | 2ED21064S06JXUMA1 |
|---|---|---|
| Marca | Infineon | Infineon |
| Categoría | Power MOSFET Drivers | Power MOSFET Drivers |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $1,68 | $0,85 |
| Driver Configuration | Half-Bridge | — |
| Number of Drivers | 2 (high-side + low-side) | — |
| Input Type | Non-Inverting | — |
| Blocking Voltage (Voffset) | 650 V | — |
| Output Current (Source/Sink) | 2.5 A typical | — |
| Bootstrap Diode | Integrated | Integrated |
| Supply Voltage (VCC) | 10 V to 20 V [DATA_NEEDED: exact range] | 10 V to 20 V |
| Propagation Delay (Typ.) | 200 ns [DATA_NEEDED: matching value] | — |
| Input Logic Compatibility | TTL/CMOS 3.3 V and 5 V | 3.3 V / 5 V CMOS |
| Undervoltage Lockout (UVLO) | Yes, both HS and LS rails | — |
| Shutdown Pin | Yes | — |
| Negative VS Transient Immunity | -100 V typical | — |
| Rango de temperatura de funcionamiento | -40 C to +125 C | — |
| Encapsulado | PG-DSO-14-49 (DSO-14) | PG-DSO-14 (14-pin SOIC) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Nivel MSL | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL level] |
| Estado RoHS | Compliant | ROHS3 Compliant |
| Función | — | High-Side and Low-Side Gate Driver |
| Configuration | — | Half-Bridge (2 outputs, non-inverting) |
| Topología | — | High-Side, Low-Side with integrated bootstrap diode |
| Maximum Offset / Boot Voltage | — | 650 V |
| Source Current (typical) | — | 0.29 A |
| Sink Current (typical) | — | 0.7 A |
| Rise Time (typical) | — | [DATA_NEEDED: rise time] |
| Fall Time (typical) | — | [DATA_NEEDED: fall time] |
| Propagation Delay (typical) | — | 100 ns |
| Channel-to-Channel Delay Match | — | [DATA_NEEDED: channel-to-channel delay match] |
| Under-Voltage Lockout | — | Yes (both channels) |
| Temperatura de funcionamiento | — | -40C to +125C |
| Negative Gate Drive Robustness | — | -0.7 V |