2EDN7524GXTMA1 vs 2EDN7534FXTMA1 Comparación
Comparación detallada lado a lado de 2EDN7524GXTMA1 por Infineon y 2EDN7534FXTMA1 por Infineon. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Infineon
2EDN7524GXTMA1 - 5A Dual Low-Side Gate Driver for MOSFET/GaN | Infineon
2EDN7524GXTMA1 ✓ Activo
Comparación de especificaciones
| Parámetro | 2EDN7524GXTMA1 | 2EDN7534FXTMA1 |
|---|---|---|
| Marca | Infineon | Infineon |
| Categoría | Power MOSFET Drivers | Power MOSFET Drivers |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $0,82 | $0,71 |
| Product Type | Low-side gate driver IC | — |
| Number of Channels | 2 (dual) | — |
| Drive Current (Source/Sink) | 5 A peak | — |
| Input Logic | Non-inverting, TTL / 3.3 V CMOS-compatible | — |
| Input Voltage Tolerance | -10 V to +20 V on logic pins | — |
| Supply Voltage (VCC) | 4.5 V to 20 V [DATA_NEEDED: exact range] | — |
| Propagation Delay | 20 ns typical [DATA_NEEDED: exact figure] | — |
| Channel-to-Channel Delay Matching | 1 ns | — |
| Tiempo de subida | 5 ns typical [DATA_NEEDED: exact test condition] | — |
| Tiempo de bajada | 5 ns typical [DATA_NEEDED: exact test condition] | — |
| Output Stage | Rail-to-rail, separate source/sink | — |
| UVLO Protection | Yes | — |
| Temperatura de funcionamiento | -40 C to +125 C | -40C to +125C |
| Encapsulado | PG-WSON-8-1 (3 mm x 3 mm) with exposed thermal pad | PG-DSO-8 |
| Tipo de montaje | Surface Mount | Surface Mount |
| Nivel MSL | [DATA_NEEDED: MSL level] | — |
| Estado RoHS | Compliant | Compliant |
| Target Devices | Standard MOSFETs, superjunction MOSFETs, GaN HEMTs | — |
| Driver Type | — | Low-Side, Dual Channel |
| Number of Drivers | — | 2 |
| Peak Output Current | — | 5 A (source/sink) |
| Supply Voltage (VDD) | — | 4.5 V to 20 V |
| Input Voltage Range (logic pins) | — | -12 V to +22 V (absolute max) |
| Propagation Delay (typical) | — | 19 ns |
| Input Logic Compatibility | — | LV-TTL |
| Output Polarity | — | Non-Inverting |
| Output Voltage Clamping | — | Active, to VDD |
| Rise Time (typ.) | — | [DATA_NEEDED: rise time] |
| Fall Time (typ.) | — | [DATA_NEEDED: fall time] |
| Channel-to-Channel Skew | — | [DATA_NEEDED: channel skew] |
| Under-Voltage Lockout | — | Yes |
| Patilla de habilitación | — | Yes |