5M160ZE64A5N vs 5M40ZE64C5N Comparación
Comparación detallada lado a lado de 5M160ZE64A5N por Altera y 5M40ZE64C5N por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | 5M160ZE64A5N | 5M40ZE64C5N |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $6,20 | $4,85 |
| Family | MAX V | — |
| Device | 5M160ZE64A5N | — |
| Macro Cells | 128 | — |
| Logic Elements | 160 | — |
| User I/O Pins | 54 | — |
| Maximum Operating Frequency | 118.3 MHz | — |
| Pin-to-Pin Propagation Delay | 7.5 ns | — |
| User Flash Memory | 8 Kbits | — |
| Core Voltage (VCCINT) | 1.8 V (1.71 V to 1.89 V) | — |
| I/O Voltage Support | 1.5 V, 1.8 V, 2.5 V, 3.3 V | 1.5 V / 1.8 V / 2.5 V / 3.3 V LVCMOS, LVTTL |
| Encapsulado | 64-pin EQFP (exposed-pad QFP) | 64-pin EQFP (Plastic Enhanced Thin QFP) with exposed thermal pad |
| Temperatura de funcionamiento | -40C to +125C (automotive AEC-Q100) | 0C to +85C (commercial) |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | JTAG (IEEE 1149.1) - in-system programmable |
| Configuration Method | Non-volatile flash, instant-on | — |
| Estado RoHS | Compliant | [DATA_NEEDED: RoHS compliance status] |
| Tipo de montaje | Surface Mount | Surface Mount |
| Series | — | MAX V |
| Device Type | — | CPLD - Complex Programmable Logic Device |
| Logic Elements (LE) | — | 40 |
| Macrocells | — | 32 |
| Maximum User I/Os | — | 54 |
| Propagation Delay (tPD1) | — | 7.5 ns |
| Maximum Internal Frequency | — | 118.3 MHz |
| Configuration Memory | — | Flash (non-volatile) |
| Supply Voltage - Core | — | 1.8 V (internal) |
| External Supply Voltage | — | 3.3 V |
| User Flash Memory (UFM) | — | Yes (on-chip non-volatile) |