5M160ZT100I5N vs 5M160ZT100C5N Comparación
Comparación detallada lado a lado de 5M160ZT100I5N por Intel y 5M160ZT100C5N por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | 5M160ZT100I5N | 5M160ZT100C5N |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $4,10 | $4,75 |
| Family | MAX V | — |
| Series | 5M160Z | MAX V |
| Macro Cells | 128 | 128 |
| Logic Elements (LEs) | 160 | 160 |
| Number of I/O | 79 (max user I/Os) | — |
| Maximum Internal Frequency | 118.3 MHz | — |
| Pin-to-Pin Delay (tPD) | 7.5 ns | — |
| Core Voltage (VCCINT) | 1.8 V | 1.8 V |
| I/O Voltage (VCCIO) | 1.2 V to 3.3 V (multi-voltage LVCMOS/LVTTL) | 1.5 V to 3.3 V |
| User Flash Memory | 8 Kbits | — |
| Encapsulado | 100-pin TQFP (T100) | TQFP-100 |
| Tipo de montaje | Surface Mount | Surface Mount |
| Temperatura de funcionamiento | -40 °C to +100 °C (industrial) | 0 °C to +85 °C (commercial) |
| Programmability | In-system via JTAG (IEEE 1149.1) | — |
| Configuration Memory | Non-volatile (flash-backed EEPROM) | — |
| Estado RoHS | Compliant | Compliant |
| Device Family | — | MAX V CPLD |
| User I/Os | — | 79 |
| Number of Logic Array Blocks (LABs) | — | 8 |
| Propagation Delay (tPD) | — | 7.5 ns |
| Maximum Operating Frequency | — | 152 MHz (typical, internal) |
| User Flash Memory (UFM) | — | 8 Kbits |
| Nivel MSL | — | 3 |
| Lead-Free | — | Yes |
| Programming Interface | — | JTAG (IEEE 1149.1) - in-system |