5M80ZT100I5N vs 5M570ZT100I5N Comparación
Comparación detallada lado a lado de 5M80ZT100I5N por Intel y 5M570ZT100I5N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | 5M80ZT100I5N | 5M570ZT100I5N |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $7,37 | $6,74 |
| Family | MAX V CPLD | MAX V CPLD |
| Logic Elements (LE) | 80 | — |
| Macrocells (approx.) | 160 | — |
| User I/O Pins | 64 | — |
| Encapsulado | TQFP-100 (100 pins, 0.5 mm pitch) | 100-pin TQFP (14 x 14 mm) |
| Pin-to-Pin Logic Delay (tPD) | 7.5 ns | — |
| Core Supply Voltage (VCCINT) | 1.71 V to 1.89 V (1.8 V typical) | — |
| I/O Supply Voltage (VCCIO) | 1.2 V / 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| Operating Temperature (Industrial) | -40 °C to +100 °C | — |
| Configuration Memory | Internal non-volatile flash (instant-on) | Flash (non-volatile, instant-on) |
| UFM (User Flash Memory) | Up to 8 Kbits user-accessible | — |
| JTAG / ISP | IEEE 1149.1 boundary-scan + in-system programming | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Nivel MSL | MSL3 (per JEDEC J-STD-020) | 3 |
| Estado RoHS | Compliant | Compliant |
| Series | — | MAX V |
| Logic Elements | — | 570 |
| Macrocells | — | 440 |
| Maximum User I/O | — | 79 |
| Propagation Delay (tPD) | — | 9 ns |
| Maximum Internal Frequency | — | 118.3 MHz |
| Number of Dedicated Clock Pins | — | 8 |
| Core Supply Voltage | — | 1.8 V |
| I/O Bank Voltage Support | — | 1.8 V / 2.5 V / 3.3 V / 5.0 V (MultiVolt) |
| Temperatura de funcionamiento | — | -40C to +100C (Industrial) |
| Programming Interface | — | JTAG (IEEE 1149.1) / ISP |