A3P1000L-1FGG144 vs A3P400-2FGG144 Comparación
Comparación detallada lado a lado de A3P1000L-1FGG144 por Microchip Technology y A3P400-2FGG144 por Microchip Technology. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Microchip Technology
A3P1000L-1FGG144 - ProASIC3L Low Power Flash FPGA | Microchip
A3P1000L-1FGG144 ✓ ActivoMicrochip Technology
A3P400-2FGG144 - ProASIC3 Flash FPGA 97 I/O | Microchip
A3P400-2FGG144 ✓ ActivoComparación de especificaciones
| Parámetro | A3P1000L-1FGG144 | A3P400-2FGG144 |
|---|---|---|
| Marca | Microchip Technology | Microchip Technology |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $29,90 | $40,20 |
| Logic Elements | 24576 | — |
| Equivalent System Gates | 1000000 | — |
| User I/O | 97 | — |
| Family | ProASIC3L (Flash*Freeze) | ProASIC3 |
| Core Supply Voltage Range | 1.14 V to 1.575 V | — |
| Core Voltage Options | 1.2 V to 1.5 V | — |
| Speed Grade | -1 | -2 |
| Configuration Memory | On-chip Flash (non-volatile, instant-on) | — |
| Temperatura de funcionamiento | 0C to +85C (TJ) | [DATA_NEEDED: operating temperature range] |
| Encapsulado | 144-LBGA / 144-FPBGA (13x13 mm) | 144-LBGA (FGG144) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Number of Registers | [DATA_NEEDED: number of registers] | — |
| Embedded Memory | [DATA_NEEDED: embedded SRAM capacity] | — |
| PLLs | [DATA_NEEDED: number of PLLs] | — |
| Packaging | Tray | — |
| Estado RoHS | ROHS3 Compliant | Lead free (per Kynix listing) |
| Product Status | Active | — |
| Manufacturer Lead Time | 8 weeks | — |
| System Gates | — | 403000 |
| User I/Os | — | 97 |
| Embedded SRAM | — | 55296 bits (true dual-port) |
| Programming Technology | — | Nonvolatile Flash |
| Process Technology | — | 130 nm, 7-layer metal (6 copper) CMOS |
| Live at Power-Up | — | LAPU Level 0 |
| Configuration | — | Single-chip, no external boot ROM |
| Soft Processor Support | — | Optional soft ARM support |
| I/O Banks | — | 4 (independent VCCIBx supplies) |
| Reprogrammability | — | Yes (in-system reprogrammable flash) |
| Tensión de alimentación | — | [DATA_NEEDED: core supply voltage] |