A3PE3000L-FGG896 vs A3PE3000L-FGG896M Comparación
Comparación detallada lado a lado de A3PE3000L-FGG896 por Microchip Technology y A3PE3000L-FGG896M por Microchip Technology. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Microchip Technology
A3PE3000L-FGG896 - 3M Gate Flash FPGA | Microchip Technology
A3PE3000L-FGG896 ✓ ActivoMicrochip Technology
A3PE3000L-FGG896M - 3M-Gate Low-Power Flash FPGA | Microchip
A3PE3000L-FGG896M ✓ ActivoComparación de especificaciones
| Parámetro | A3PE3000L-FGG896 | A3PE3000L-FGG896M |
|---|---|---|
| Marca | Microchip Technology | Microchip Technology |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $55,00 | $0,00 |
| System Gates | 3,000,000 | 3,000,000 |
| Logic Cells | 75,264 | 75,264 |
| Total SRAM | 504 kbits | — |
| User I/Os (FGG896) | 620 | — |
| Encapsulado | 896-ball FBGA (FGG896), 1.0 mm pitch | 896-ball FBGA (FGG896), 1 mm pitch |
| Tipo de montaje | Surface Mount | Surface Mount |
| Core Supply Voltage | 1.2 V to 1.5 V | — |
| I/O Supply Voltage | [DATA_NEEDED: I/O supply voltage range] | — |
| Temperatura de funcionamiento | 0 C to +70 C | 0 to 70 C |
| Logic Family | CMOS | CMOS |
| Process Technology | 130-nm, 7-layer metal (6 copper), flash-based | 130-nm, 7-layer metal (6 copper), flash-based CMOS |
| Flash*Freeze Support | Yes | — |
| Live-At-Power-Up | Level 0 support | — |
| Reconfiguration | Reprogrammable (in-system programmable) | — |
| Lead-Free Finish | Yes | — |
| Estado RoHS | [DATA_NEEDED: RoHS compliance status] | — |
| Clock Inputs | [DATA_NEEDED: number of clock conditioning circuits/PLLs] | — |
| Speed Grade | [DATA_NEEDED: speed grade for -FGG896 base part] | — |
| Power Consumption | [DATA_NEEDED: typical static/dynamic power] | — |
| Ball Count | 896 | — |
| Family | — | ProASIC3L (Flash-based FPGA) |
| User I/Os | — | Up to 616 (620 per DigiKey listing) |
| Embedded SRAM | — | 504 kbits true dual-port |
| Core Voltage | — | 1.2 V to 1.5 V |
| Tensión de alimentación | — | 1.5 V |
| Configuration | — | Non-volatile flash, live-at-power-up Level 0, single-chip |
| Low-Power Feature | — | Flash*Freeze technology |
| Boundary Scan | — | IEEE 1149.1 (JTAG) |
| Input Features | — | Schmitt trigger option on single-ended inputs; weak pull-up/pull-down |