ATF16V8B-15PC vs ATF16V8B-15JI Comparación
Comparación detallada lado a lado de ATF16V8B-15PC por Microchip Technology y ATF16V8B-15JI por Microchip Technology. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Microchip Technology
ATF16V8B-15PC - 15 ns 250-Gate EEPLD | Microchip Technology
ATF16V8B-15PC ✓ ActivoMicrochip Technology
ATF16V8B-15JI - 15ns 8-Macrocell EEPLD | Microchip Technology
ATF16V8B-15JI ObsoleteComparación de especificaciones
| Parámetro | ATF16V8B-15PC | ATF16V8B-15JI |
|---|---|---|
| Marca | Microchip Technology | Microchip Technology |
| Categoría | Logic ICs | Logic ICs |
| Estado del ciclo de vida | Activo | Obsolete |
| Device Type | Electrically erasable programmable logic device (EEPLD) | — |
| Programmable Gate Capacity | 250 gates | — |
| Maximum Inputs | Up to 16 inputs | 16 inputs |
| I/O Count | 8 I/Os | 8 I/Os |
| Macrocell Count | 8 macrocells | — |
| Speed Grade | 15 ns | 15 ns |
| Family Maximum Pin-to-Pin Delay | 7.5 ns | — |
| Tensión de alimentación | 5 V | 5 V |
| Configuration Technology | Electrically erasable Flash memory | — |
| Logic Architecture | 16V8 architecture with 8 outputs | — |
| Output Product-Term Allocation | 8 product terms per output | — |
| Operating Mode Support | Three software-selected modes of operation | — |
| Power Class | Standard power | — |
| Encapsulado | 20-pin PDIP | 20-pin PLCC, 9 x 9 mm |
| Package Pitch | 7.62 mm (0.300 inch) | — |
| Package Finish | Green package | — |
| Tipo de montaje | Through-hole | Surface Mount |
| Family Standby Current | 5 mA | — |
| Estado RoHS | unknown | [DATA_NEEDED: RoHS compliance status] |
| REACH Status | unknown | [DATA_NEEDED: REACH compliance status] |
| AEC-Q100 Qualification | not_applicable | — |
| Rango de temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | — |
| Product Type | — | Electrically Erasable Programmable Logic Device (EEPLD) |
| Device Architecture | — | 16V8 |
| Macrocells | — | 8 macrocells |
| Equivalent Gate Capacity | — | 250 gates |
| Output Count | — | 8 outputs |
| Product Terms per Output | — | 8 product terms |
| Maximum Pin-to-Pin Delay | — | 10 ns |
| Configuration Memory | — | Electrically erasable Flash memory |
| Supported Architecture Modes | — | Registered, combinatorial, and complex programmable modes selected by software |
| Terminal Count | — | 20 terminals |
| Temperature Grade | — | Industrial |