ATSAMA5D23A-CNR vs ATSAMA5D27A-CNR Comparación
Comparación detallada lado a lado de ATSAMA5D23A-CNR por Microchip Technology y ATSAMA5D27A-CNR por Microchip Technology. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Microchip Technology
ATSAMA5D23A-CNR - 500MHz Cortex-A5 MPU, 196-TFBGA | Microchip
ATSAMA5D23A-CNR ✓ ActivoMicrochip Technology
ATSAMA5D27A-CNR - 500MHz Cortex-A5 MPU, 289-LFBGA | Microchip
ATSAMA5D27A-CNR ✓ ActivoComparación de especificaciones
| Parámetro | ATSAMA5D23A-CNR | ATSAMA5D27A-CNR |
|---|---|---|
| Marca | Microchip Technology | Microchip Technology |
| Categoría | Microcontrollers | Microcontrollers |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $11,20 | $10,95 |
| Core Architecture | ARM Cortex-A5 (32-bit RISC) | — |
| Maximum CPU Clock | 500 MHz | 500 MHz |
| Core Count | 1 | — |
| L1 Instruction Cache | 32 Kbytes | — |
| L1 Data Cache | 32 Kbytes | — |
| Internal SRAM | 128 Kbytes | — |
| NEON Coprocessor | Yes | — |
| Hardware FPU | Yes (VFPv4) | — |
| External Memory Bus | 16-bit DDR2/LPDDR/DDR3 | — |
| Encapsulado | 196-TFBGA (11x11 mm, 0.8 mm pitch) | 289-LFBGA, 14x14 mm |
| Temperatura de funcionamiento | -40 °C to +105 °C (extended industrial) | -40C to +105C (industrial) |
| Tensión de alimentación | 1.2 V (core), 1.8 V/3.3 V (I/O) | — |
| Peripheral Touch Controller (PTC) | Yes | — |
| CAN Controller | CAN-FD | — |
| USB | USB 2.0 High-Speed Host + Device | USB 2.0 + HSIC |
| Ethernet | 10/100 MAC (GMII/RMII/MII) | 10/100 Mbps (1x EMAC) with IEEE 1588 |
| LCD Controller | 24-bit, up to WXGA (1280x768) | — |
| Image Sensor Interface (ISI) | Yes (12-bit, up to 35 MPixel/s) | — |
| Crypto Engine | AES, TRNG, secure boot, OTFA | — |
| Estado RoHS | Compliant | Compliant |
| Core Processor | — | ARM Cortex-A5 |
| Number of Cores | — | 1 Core, 32-Bit |
| Instruction Set Architecture | — | ARMv7-A with Neon, MPE |
| Graphics Acceleration | — | Yes (2D Graphics LCD Controller, GLCDC) |
| L1 Cache | — | 32 KB I-cache + 32 KB D-cache |
| L2 Cache | — | 128 KB |
| External Memory Controller | — | DDR2, DDR3L, LPDDR2, LPDDR3, QSPI, e.MMC Flash |
| Display Interface | — | Keyboard, LCD, Touchscreen (24-bit GLCDC) |
| CAN | — | CAN, CAN-FD (1) |
| Hardware Cryptography | — | AES-128/256, secure boot, TRNG, tamper pins |
| I/O Voltage | — | 3.3 V |
| Tipo de montaje | — | Surface Mount |
| Nivel MSL | — | 3 |
| Delivery Form | — | Tape & Reel (TR) |