CDK8307CILP64 vs CDK8307BILP64 Comparación
Comparación detallada lado a lado de CDK8307CILP64 por MaxLinear y CDK8307BILP64 por MaxLinear. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
MaxLinear
CDK8307CILP64 - 12/13-bit 65MSPS Octal ADC, LVDS Output | MaxLinear
CDK8307CILP64 ✓ Activo
Comparación de especificaciones
| Parámetro | CDK8307CILP64 | CDK8307BILP64 |
|---|---|---|
| Marca | MaxLinear | MaxLinear |
| Categoría | ADC/DAC | ADC/DAC |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $11,95 | $21,40 |
| Resolución | 12/13-bit (selectable) | 12-bit or 13-bit (programmable) |
| Sample Rate | 65 MSPS maximum (20/40/50/65 MSPS grades) | — |
| Number of Channels | 8 (simultaneous sampling) | 8 |
| Digital Output Interface | Serial LVDS | — |
| Input Type | Differential analog inputs | Differential analog inputs (one per channel) |
| Reference | Internal (integrated bandgap) | Internal (integrated bandgap reference) |
| Control Interface | SPI-compatible serial | Serial control interface |
| Encapsulado | 64-pin LQFP (LP64) | 64-pin QFN (LP suffix) |
| Architecture | Proprietary pipeline ADC | — |
| Power Profile | Ultra-low power (per-channel) | — |
| Rango de temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| Supply Voltage (AVDD) | [DATA_NEEDED: AVDD nominal] | — |
| Supply Voltage (DRVDD/LVDS) | [DATA_NEEDED: DRVDD nominal] | — |
| ENOB | [DATA_NEEDED: effective number of bits] | — |
| SNR | [DATA_NEEDED: signal-to-noise ratio] | — |
| SFDR | [DATA_NEEDED: spurious-free dynamic range] | — |
| Estado RoHS | Compliant (per MaxLinear product page) | Compliant |
| Tipo de montaje | Surface Mount | Surface Mount |
| Product Type | — | Octal Analog-to-Digital Converter (ADC) |
| Sample Rate (per channel) | — | 20 / 40 / 50 / 65 MSPS |
| Total Power Dissipation | — | 280 mW |
| Data Output Interface | — | Serial LVDS |
| Clock Architecture | — | External reference clock with integrated PLL (x12 or x14 multiplication) |
| Tensión de alimentación | — | [DATA_NEEDED: supply voltage rating] |