EP1C3T100C8N vs EP1C3T100C8 Comparación
Comparación detallada lado a lado de EP1C3T100C8N por Intel y EP1C3T100C8 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP1C3T100C8N | EP1C3T100C8 |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Fin de vida |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $14,20 | $9,75 |
| Family | Cyclone | Cyclone I |
| Logic Elements | 2,910 | 2,910 LEs |
| Logic Array Blocks (LABs) | 291 | — |
| Total RAM Bits | 59,904 | 59,904 bits |
| Embedded RAM Blocks | 13 x M4K (4 Kbit each) | — |
| Maximum User I/Os | 65 | — |
| PLLs | 1 | 1 general-purpose PLL |
| Operating Frequency (max) | 275 MHz | — |
| Core Voltage | 1.425 V to 1.575 V | — |
| Process Technology | 130 nm CMOS | — |
| Encapsulado | TQFP-100 (100-pin Thin Quad Flat Pack), 16 x 16 mm, 0.5 mm pitch | TQFP-100 (14x14 mm) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Temperatura de funcionamiento | 0C to +85C (Commercial) | 0C to +85C (commercial) |
| Configuration Interface | Passive Serial (PS), Fast Passive Parallel (FPP), JTAG | — |
| Nivel MSL | 3 (168 hours) | — |
| Estado RoHS | Compliant (lead-free, 'N' suffix) | Compliant |
| Core Process | — | 0.13 µm SRAM |
| Core Voltage (VCCINT) | — | 1.5 V |
| M4K RAM Blocks | — | 13 (4 Kbit each) |
| Embedded Multipliers | — | Not present on EP1C3 |
| Global Clock Networks | — | 8 |
| User I/O Pins | — | 65 |
| Speed Grade | — | -8 (commercial) |
| Configuration Modes | — | AS, PS, JTAG |
| I/O Standards | — | LVTTL, LVCMOS, SSTL-2/3, LVDS, RSDS |
| Lifecycle | — | EOL per PDN1810 (since 2019) |