EP1K100QI208-2N vs EP1K100QC208-3N Comparación

Comparación detallada lado a lado de EP1K100QI208-2N por Altera y EP1K100QC208-3N por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.

Altera
EP1K100QC208-3N EP1K100QC208-3N - ACEX-1K FPGA 100K Gates | Altera

EP1K100QC208-3N - ACEX-1K FPGA 100K Gates | Altera

EP1K100QC208-3N Obsolete

Comparación de especificaciones

Parámetro EP1K100QI208-2N EP1K100QC208-3N
Marca Altera Altera
Categoría FPGA & CPLD FPGA & CPLD
Estado del ciclo de vida Obsolete Obsolete
Estado del stock In Stock In Stock
Precio unitario (USD) $0,00 $19,50
Series ACEX-1K —
FPGA Family ACEX-1K —
Number of Logic Elements/Cells 4992 —
Number of LABs/CLBs 624 —
Total RAM Bits 49152 —
Number of User I/O 147 —
Encapsulado / Carcasa 208-BFQFP —
Tipo de montaje Surface Mount Surface Mount
Core Supply Voltage 2.5 V 2.5 V
Speed Grade -2 —
Temperature Grade I (industrial) —
System Gates 257000 —
Typical Gate Count 100K gates (family) —
Rango de temperatura de funcionamiento [DATA_NEEDED: exact industrial temperature limits from ACEX-1K datasheet] Commercial grade ([DATA_NEEDED: exact operating temperature range])
Max User I/O in 208-BFQFP 147 —
Total Number of Configuration Bits [DATA_NEEDED: configuration bitstream size] —
Maximum Internal Clock Frequency [DATA_NEEDED: clock frequency for -2 speed grade] 200 MHz
I/O Standard Support [DATA_NEEDED: supported I/O standards] —
PLL/Clock Management [DATA_NEEDED: PLL availability on EP1K100] —
Estado RoHS [DATA_NEEDED: manufacturer RoHS certificate] [DATA_NEEDED: RoHS certificate status]
Product Series — ACEX-1K
Device Type — Field Programmable Gate Array (FPGA)
Number of Logic Elements — 4992
Number of LABs — 624
Embedded RAM Bits — 49152
Total Typical Gates — 100K
Number of User I/Os — 147
I/O Supply Voltage Range — [DATA_NEEDED: I/O supply voltage range]
Package Type — 208-BFQFP
Número de pines — 208
Terminal Form — Gull Wing
JTAG Boundary Scan — IEEE Std. 1149.1-1990 compliant built-in BST
Lead-Free Version — Yes (N suffix)
Supported Configuration Devices — EPC2/EPC16 family ([DATA_NEEDED: exact ACEX-1K supported list])
Moisture Sensitivity Level — [DATA_NEEDED: MSL level]

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