EP1K10TC100-3N vs EP1K10TC144-3N Comparación
Comparación detallada lado a lado de EP1K10TC100-3N por Intel y EP1K10TC144-3N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
EP1K10TC100-3N - 10K-Gate ACEX-1K FPGA, 576 Cells, 66 I/O, 100-TQFP | Intel / Altera
EP1K10TC100-3N Obsolete
Comparación de especificaciones
| Parámetro | EP1K10TC100-3N | EP1K10TC144-3N |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $19,95 | $10,50 |
| Series | ACEX-1K | — |
| Family | ACEX 1K | ACEX-1K |
| Manufacturer | Intel (formerly Altera) | — |
| Typical Gate Count | 10,000 gates | — |
| Logic Elements (Cells) | 576 | — |
| Embedded Memory (EAB) | 12,288 bits | — |
| Number of LABs | 72 | 72 |
| User I/O Count | 66 | — |
| Operating Voltage (Core) | 2.5 V | — |
| Process Technology | 0.22 µm CMOS | 0.22 um CMOS |
| Maximum Internal Clock Frequency | 200 MHz | — |
| Speed Grade | -3 (commercial) | -3N (enhanced) |
| Encapsulado | 100-pin TQFP | 144-LQFP (TQFP) |
| JTAG Support | Yes (IEEE 1149.1-1990) | — |
| PCI Compliance | PCI Local Bus Specification Revision 2.2 (5.0 V) | — |
| Configuration | JTAG / serial configuration device | — |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | — |
| Estado RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: confirm lead-free status] |
| Typical Gates | — | 10,000 |
| Logic Elements / Cells | — | 576 |
| Total RAM Bits | — | 12,288 |
| User I/O Pins | — | 92 |
| Number of EABs | — | 3 |
| Tipo de montaje | — | Surface Mount |
| Core Voltage | — | 2.5 V |
| Rango de temperatura de funcionamiento | — | [DATA_NEEDED: industrial or commercial grade] |
| JTAG Boundary-Scan | — | Yes (IEEE Std. 1149.1-1990 compliant) |
| PCI Compliance (-1 grade) | — | 5.0 V operation per PCI Local Bus Spec 2.2 |