EP1K30TC144-1N vs EP1K30TC1443N Comparación
Comparación detallada lado a lado de EP1K30TC144-1N por Altera y EP1K30TC1443N por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP1K30TC144-1N | EP1K30TC1443N |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $11,50 | $9,95 |
| Series | ACEX-1K | — |
| Number of Logic Elements (LEs) | 1,728 | — |
| Typical Gates | 30,000 | 30,000 gates |
| Number of Logic Array Blocks (LABs) | 216 | — |
| Embedded Memory (EAB) | 24,576 bits (6 EABs) | — |
| Number of User I/O | 102 | — |
| Number of I/O Banks | 4 | — |
| Package Type | 144-LQFP (TQFP) | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Core Voltage | 2.5 V | — |
| I/O Voltage | 3.3 V (LVCMOS/LVTTL); 2.5 V tolerant | — |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | 0C to +70C (commercial) |
| Process Technology | 0.18 µm SRAM | 0.22 um CMOS |
| Configuration | SRAM-based, JTAG (IEEE 1149.1) + serial/parallel passive | JTAG (IEEE 1149.1), passive serial |
| PLLs | 6 (per device family) | — |
| Estado RoHS | [DATA_NEEDED: RoHS compliance status] | Compliant (per legacy Altera product page) |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Nivel MSL | [DATA_NEEDED: MSL moisture sensitivity level] | — |
| Family | — | ACEX 1K |
| Logic Elements | — | 1,728 LEs |
| Embedded Memory | — | 24 Kbit SRAM (EAB) |
| Maximum User I/O | — | 102 |
| Supply Voltage (Core) | — | 2.5 V |
| Speed Grade | — | -3 (slowest) |
| Encapsulado | — | TQFP-144 (20x20 mm) |
| I/O Standards | — | LVTTL, LVCMOS (2.5V/3.3V/5V tolerant) |
| Toolchain | — | Quartus II 13.0 or earlier |