EP1M120F484-I6 vs EP1M120F484C5 Comparación
Comparación detallada lado a lado de EP1M120F484-I6 por Altera y EP1M120F484C5 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP1M120F484-I6 | EP1M120F484C5 |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | NRND | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $98,50 | $110,00 |
| Family | Mercury FPGA | Mercury Device Family |
| Logic Elements (LEs) | 4,800 | — |
| Equivalent Gates | 120,000 | — |
| Logic Array Blocks (LABs) | 480 | 480 |
| User I/Os | 303 | — |
| High-Speed Transceivers | Up to 12 channels | — |
| Transceiver Data Rate | Up to 1.25 Gbps per channel | 1.25 Gbps (CDR-capable) |
| Core Voltage | 1.8 V | — |
| Process Technology | 0.18 µm CMOS | — |
| Encapsulado | 484-pin FBGA (FineLine BGA) | 484-ball FineLine BGA (FBGA-484) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Temperatura de funcionamiento | -40 °C to +100 °C (industrial) | 0 C to +85 C (Commercial) |
| Speed Grade | -6 | -5 |
| Configuration Modes | Passive Serial, Passive Parallel Sync/Async, JTAG, EPC device | — |
| I/O Standards | LVTTL, LVCMOS, PCI, LVDS, LVPECL, HSTL | — |
| Device Type | — | FPGA (Field Programmable Gate Array) |
| User I/O Count | — | 303 |
| Core Supply Voltage | — | 1.8 V |
| Grade Suffix | — | C (Commercial, 0 C to +85 C) |
| Architecture | — | LUT-based, optimized for high performance |
| Estado RoHS | — | [DATA_NEEDED: rohs_status] |
| REACH Status | — | [DATA_NEEDED: reach_status] |
| Lead-Free | — | [DATA_NEEDED: lead_free] |
| Sin halógenos | — | [DATA_NEEDED: halogen_free] |