EP1M120F484C8N vs EP1M120F484C6N Comparación
Comparación detallada lado a lado de EP1M120F484C8N por Altera y EP1M120F484C6N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP1M120F484C8N | EP1M120F484C6N |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $142,00 | $56,50 |
| Family | Mercury (EP1M) | Mercury (APEX PLD platform) |
| Logic Family | CMOS, SRAM-based | — |
| Number of Logic Elements | 49,152 | — |
| Embedded Memory | 4,800 Kbits (M4K blocks) | — |
| User I/O Pins | 303 | — |
| Package Type | FINE LINE BGA-484 | — |
| Terminal Pitch | 1.000 mm | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Supply Voltage (Core) | 1.8 V nominal (1.71 V min, 1.89 V max) | — |
| Speed Grade | 8 | — |
| Temperatura de funcionamiento | 0 °C to 85 °C (Commercial) | 0C to 85C (commercial) |
| Transceivers | Up to 8 channels with CDR up to 1.25 Gbps | — |
| Configuration | SRAM, JTAG via Quartus II | — |
| Estado RoHS | [DATA_NEEDED: RoHS compliance] | Compliant |
| Nivel MSL | [DATA_NEEDED: MSL rating] | 3 (per JEDEC J-STD-020) |
| Typical Gates | — | 120,000 |
| Logic Cells / Elements | — | 4,800 |
| Logic Array Blocks (LABs) | — | 480 |
| User I/Os | — | 303 |
| Encapsulado | — | 484-ball FC-FBGA (FineLine BGA) |
| Core Supply Voltage (VCCINT) | — | 1.71 V to 1.89 V (1.8 V nominal) |
| Transceiver Data Rate | — | Up to 1.25 Gbps with CDR |
| Process Technology | — | CMOS |
| Architecture | — | LUT-based, optimized for high-speed interconnect |
| MultiCore Support | — | Yes (hot socketing) |