EP1M350B780C6 vs EP1M350F780C6N Comparación

Comparación detallada lado a lado de EP1M350B780C6 por Altera y EP1M350F780C6N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.

Comparación de especificaciones

Parámetro EP1M350B780C6 EP1M350F780C6N
Marca Altera Intel
Categoría FPGA & CPLD FPGA & CPLD
Estado del ciclo de vida NRND Última compra
Estado del stock In Stock In Stock
Precio unitario (USD) $125,00 $219,40
Manufacturer Altera Corporation (now Intel FPGA) —
Family Mercury PLD Mercury (EP1M350)
Device Type FPGA (Field Programmable Gate Array) Loadable Programmable Logic Device (PLD) / FPGA
Typical Gate Count 350,000 gates —
Logic Elements [DATA_NEEDED: logic element count] —
Embedded Memory (EAB) [DATA_NEEDED: EAB count and total RAM bits] —
Phase-Locked Loops (PLLs) [DATA_NEEDED: PLL count] —
Encapsulado 780-pin FineLine BGA 780-ball FC-FBGA (FINE LINE BGA-780)
User I/O Pins (approx.) 488 —
Speed Grade -6 —
Temperatura de funcionamiento Commercial (0 C to +85 C) [DATA_NEEDED: explicit Tj range] 0 C to 85 C
Supply Voltage (Core) [DATA_NEEDED: VCCINT] —
Supply Voltage (I/O) [DATA_NEEDED: VCCIO] —
I/O Standards LVTTL, LVCMOS, LVDS (per family datasheet) —
Embedded Transceivers High-speed serial transceivers (Mercury family feature) —
Peak Reflow Temperature 220 C (per distributor records) —
Tipo de montaje Surface Mount (BGA) —
Nivel MSL [DATA_NEEDED: MSL rating] [DATA_NEEDED: msl_level]
Estado RoHS [DATA_NEEDED: lead-free / RoHS classification] [DATA_NEEDED: rohs_status]
Programming Interface JTAG (IEEE 1149.1) + Altera passive serial/AS modes —
Tool Flow Quartus II / MAX+PLUS II (Altera legacy) —
Datasheet File Size 869 Kbytes (per Alldatasheet index) —
Datasheet Page Count 86 pages (per Alldatasheet index) —
Logic Family — CMOS, SRAM-based LUT
System Gates — 350,000
Logic Cells / Elements — 14,400
User I/Os — 486
Integrated Transceivers — Yes, with CDR up to 1.25 Gbps
Core Supply Voltage — 1.8 V
Terminal Form — Ball
Package Code (JEDEC) — S-PBGA-B780
Configuration Interface — JTAG (IEEE 1149.1) / passive serial
Lead-Free — [DATA_NEEDED: lead_free]
Architecture — Look-up table (LUT)-based, optimized for high-speed serial I/O
Total Package Pins / Balls — 780

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