EP1M350F780C5N vs EP1M350F780C6N Comparación
Comparación detallada lado a lado de EP1M350F780C5N por Altera y EP1M350F780C6N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Altera
EP1M350F780C5N - 350K Gates Mercury FPGA w/ 1.25 Gbps CDR | Intel/Altera
EP1M350F780C5N ObsoleteIntel
EP1M350F780C6N - Mercury 350K FPGA, 486 I/O, 780-BGA | Intel (Altera)
EP1M350F780C6N ⚠ Última compraComparación de especificaciones
| Parámetro | EP1M350F780C5N | EP1M350F780C6N |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Última compra |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $115,00 | $219,40 |
| Device Family | Mercury (EP1M350) | — |
| Equivalent Gates | 350,000 | — |
| Logic Cells (LEs) | 14,400 | — |
| User I/Os | 486 | 486 |
| Total Pins / Terminals | 780 | — |
| Logic Family | CMOS | CMOS, SRAM-based LUT |
| Core Supply Voltage | 1.8 V | 1.8 V |
| Package Type | FineLine BGA (FC-FBGA / PBGA-B780) | — |
| Terminal Form | Ball | Ball |
| Terminal Pitch | 1.000 mm | — |
| Tipo de montaje | Surface Mount | — |
| Temperatura de funcionamiento | 0 C to 85 C | 0 C to 85 C |
| Transceivers | Integrated high-speed CDR to 1.25 Gbps | — |
| Architecture | LUT-based, optimized for high performance | Look-up table (LUT)-based, optimized for high-speed serial I/O |
| Estado RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: rohs_status] |
| Moisture Sensitivity Level | [DATA_NEEDED: MSL rating] | — |
| Family | — | Mercury (EP1M350) |
| Device Type | — | Loadable Programmable Logic Device (PLD) / FPGA |
| System Gates | — | 350,000 |
| Logic Cells / Elements | — | 14,400 |
| Integrated Transceivers | — | Yes, with CDR up to 1.25 Gbps |
| Encapsulado | — | 780-ball FC-FBGA (FINE LINE BGA-780) |
| Package Code (JEDEC) | — | S-PBGA-B780 |
| Configuration Interface | — | JTAG (IEEE 1149.1) / passive serial |
| Nivel MSL | — | [DATA_NEEDED: msl_level] |
| Lead-Free | — | [DATA_NEEDED: lead_free] |
| Total Package Pins / Balls | — | 780 |