EP1S10F672C6 vs EP1S10B672C6 Comparación
Comparación detallada lado a lado de EP1S10F672C6 por Intel y EP1S10B672C6 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP1S10F672C6 | EP1S10B672C6 |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Última compra | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $72,00 | $185,00 |
| Series | Stratix® I | Stratix |
| Family | Stratix FPGA | — |
| Logic Elements (LE) | 10,570 | — |
| Logic Array Blocks (LABs) | 1057 | — |
| Total Memory Bits | 920,448 bits | — |
| Embedded Memory | TriMatrix (MRAM/M4K) | — |
| DSP Blocks | 6 | Yes, dedicated multiply-accumulate blocks |
| Number of I/Os | 345 | — |
| Number of PLLs | 12 (6 per device side) | — |
| Core Voltage | 1.5 V | — |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| Encapsulado | 672-ball FineLine BGA (FBGA) | 672-BBGA (35 x 35 mm, 1.27 mm pitch) |
| Temperatura de funcionamiento | 0C to +85C (Commercial) | 0 C to 85 C (Commercial Extended) |
| Maximum Core Frequency | 420.17 MHz | — |
| Configuration Modes | Passive Serial (PS), Fast Passive Parallel (FPP), Active Serial (AS) | — |
| JTAG Support | IEEE 1149.1 boundary-scan | — |
| Tipo de montaje | Surface Mount (BGA) | Surface Mount (BGA) |
| Estado RoHS | [DATA_NEEDED: RoHS status] | Compliant |
| Manufacturer | — | Intel / Altera |
| Logic Elements / Cells | — | 10,570 |
| LABs / CLBs | — | 1,057 |
| User I/Os | — | 345 |
| Supply Voltage (Core) | — | 1.5 V (1.425 V - 1.575 V) |
| Maximum Operating Frequency | — | 450.05 MHz |
| Logic Family | — | CMOS |
| Supplier Device Package | — | 672-BGA |
| Memory | — | Embedded TriMatrix (MRAM/M4K) blocks |
| Clock Management | — | PLLs for clock synthesis |
| Configuration | — | JTAG / passive serial / fast passive parallel |