EP1S10F672C7 vs EP1S10F672C6 Comparación
Comparación detallada lado a lado de EP1S10F672C7 por Altera y EP1S10F672C6 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP1S10F672C7 | EP1S10F672C6 |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Última compra |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $158,00 | $72,00 |
| Family | Stratix | Stratix FPGA |
| Logic Elements | 10,570 | — |
| Embedded Memory | 920,448 bits | TriMatrix (MRAM/M4K) |
| User I/Os | 345 | — |
| Encapsulado | 672-pin FBGA (FineLine BGA) | 672-ball FineLine BGA (FBGA) |
| Package Dimensions | 35 x 35 mm, 1.27 mm pitch | — |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| Core Voltage (VCCINT) | 1.5 V | — |
| Logic Cells | 10,570 | — |
| LABs (Logic Array Blocks) | 1,057 | — |
| Temperatura de funcionamiento | 0 C to 85 C (Commercial) | 0C to +85C (Commercial) |
| Tipo de montaje | Surface Mount | Surface Mount (BGA) |
| I/O Standards | LVTTL, LVCMOS, LVDS, SSTL, HSTL | — |
| Configuration Mode | JTAG, Passive Serial, Active Serial | — |
| Estado RoHS | unknown | [DATA_NEEDED: RoHS status] |
| Series | — | Stratix® I |
| Logic Elements (LE) | — | 10,570 |
| Logic Array Blocks (LABs) | — | 1057 |
| Total Memory Bits | — | 920,448 bits |
| DSP Blocks | — | 6 |
| Number of I/Os | — | 345 |
| Number of PLLs | — | 12 (6 per device side) |
| Core Voltage | — | 1.5 V |
| Maximum Core Frequency | — | 420.17 MHz |
| Configuration Modes | — | Passive Serial (PS), Fast Passive Parallel (FPP), Active Serial (AS) |
| JTAG Support | — | IEEE 1149.1 boundary-scan |