EP1S20F672C6N vs EP1S20F672C6 Comparación
Comparación detallada lado a lado de EP1S20F672C6N por Intel y EP1S20F672C6 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP1S20F672C6N | EP1S20F672C6 |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Última compra | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $68,90 | $470,00 |
| Family | Stratix | Stratix (first generation) |
| Logic Elements | 18,460 | — |
| Total RAM Bits | 1,669,248 | — |
| User I/O Count | 426 | — |
| Encapsulado | 672-BBGA (FineLine BGA) 35 x 35 mm | 672-ball FineLine BGA |
| Package Pitch | 1.27 mm | — |
| Core Voltage | 1.5 V | — |
| Logic Family | CMOS | — |
| Temperatura de funcionamiento | 0 C to 85 C (commercial) | 0°C to +85°C (Commercial) |
| Speed Grade | -6 | C6 |
| Configuration Mode | PS, FPP, JTAG | — |
| Embedded DSP Blocks | Yes (36 x 36-bit multipliers) | — |
| TriMatrix Memory | M512, M4K, M-RAM blocks | — |
| PLLs | 12 (4 enhanced) | — |
| Global Clock Networks | 16 | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Lead Free | Yes | — |
| Estado RoHS | Compliant | [DATA_NEEDED: RoHS compliance status] |
| Manufacturer | — | Altera (now Intel) |
| Series | — | Stratix |
| Process Technology | — | 0.13 µm CMOS |
| Logic Elements (LEs) | — | 18,460 |
| Logic Array Blocks (LABs) | — | 1,846 |
| Embedded Memory Bits | — | 1,669,248 |
| Maximum User I/Os | — | 426 |
| Package Code | — | F672 |
| Tensión de alimentación | — | Core 1.5 V, I/O programmable |