EP1S20F672C7 vs EP1S20B672C6N Comparación
Comparación detallada lado a lado de EP1S20F672C7 por Intel y EP1S20B672C6N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP1S20F672C7 | EP1S20B672C6N |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Última compra | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $195,00 | $425,00 |
| Series | Stratix | EP1S20 |
| Family | Altera Stratix FPGA | Stratix |
| Logic Elements (LEs) | 18,460 | — |
| Embedded Memory Bits | 1,669,248 | — |
| User I/O Pins | 426 | — |
| DSP Blocks | [DATA_NEEDED: DSP block count] | — |
| Encapsulado | 672-ball FineLine BGA (35 x 35 mm, 1.27 mm pitch) | 672-ball BGA (672-BBGA), 35 x 35 mm, 1.27 mm pitch |
| Logic Family | CMOS, SRAM-based | — |
| Core Supply Voltage | 1.5 V | — |
| Temperatura de funcionamiento | 0C to 85C (commercial) | 0 C to +85 C (Commercial) |
| Speed Grade | C7 | 6 |
| Configuration Modes | JTAG, Passive Serial, Fast Passive Parallel, Active Serial | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Nivel MSL | [DATA_NEEDED: MSL level] | — |
| Estado RoHS | unknown | Compliant |
| Clock PLLs | Up to 10 | — |
| Logic Elements (LE) | — | 18,460 |
| Logic Array Blocks (LAB) | — | 1,846 |
| Embedded Memory | — | 1,669,248 bits |
| Maximum User I/O | — | 426 |
| Process Technology | — | 130 nm CMOS |
| Core Voltage | — | 1.5 V |
| Configuration Method | — | Passive Serial / Fast Passive Parallel / JTAG |
| Estado del ciclo de vida | — | Not Recommended for New Designs (NRND) |