EP1S20F780I5N vs EP1S10F780I6N Comparación
Comparación detallada lado a lado de EP1S20F780I5N por Intel y EP1S10F780I6N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP1S20F780I5N | EP1S10F780I6N |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | NRND | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $150,00 | $98,75 |
| Manufacturer | Intel (formerly Altera) | — |
| Series | Stratix | — |
| Device Family | EP1S20 | — |
| Logic Elements / Cells | 18,460 | — |
| Configurable Logic Blocks (CLBs) | 1,846 | — |
| Number of I/O Pins | 586 | — |
| Number of Logic Gates | [DATA_NEEDED: total gate count equivalent] | — |
| Number of RAM Bits | [DATA_NEEDED: total embedded RAM bits] | — |
| Number of Multipliers | [DATA_NEEDED: hardware multiplier count] | — |
| Voltage - Supply (Core) | 1.5 V nominal (1.425 V to 1.575 V) | — |
| Temperatura de funcionamiento | -40C to +100C | -40 °C to +100 °C (industrial) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Encapsulado / Carcasa | 780-BGA (FC-FBGA, 28x28 mm, 0.4 mm pitch) | — |
| Process Technology | 130 nm CMOS | 0.13 µm CMOS |
| Maximum Internal Clock Frequency | 500 MHz | — |
| Speed Grade | -I5 (industrial, medium speed) | -6 (6.0 ns core clock period) |
| Configuration Method | Passive Serial (PS), Fast Passive Parallel (FPP), JTAG | — |
| Estado RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS compliance status] |
| Family | — | Stratix |
| Logic Elements | — | 10,570 |
| Logic Array Blocks (LABs) | — | 1,057 |
| User I/Os | — | 426 |
| Embedded RAM (Total) | — | 920,448 bits |
| M512 Blocks | — | 94 (32 x 18 bits each) |
| M4K Blocks | — | 60 (128 x 36 bits each) |
| M-RAM Blocks | — | 1 (4 Kbit) |
| PLLs | — | 6 |
| Clock Outputs | — | 16 |
| DSP Blocks | — | 12 |
| Transceiver Channels | — | 12 (not populated on I6 speed grade) |
| Core Voltage (VCCINT) | — | 1.5 V |
| I/O Voltage (VCCIO) | — | 1.5 V, 1.8 V, 2.5 V, 3.3 V (per bank) |
| Encapsulado | — | 780-ball FineLine BGA, 29 x 29 mm, 1.0 mm pitch |
| Nivel MSL | — | 3 (168 hours) |
| Configuration Modes | — | Active Serial (AS), Passive Serial (PS), JTAG |
| Logic Family | — | CMOS |
| Supply Voltage Nominal | — | 1.5 V |