EP1S25F1020C6N vs EP1S30F1020C7N Comparación
Comparación detallada lado a lado de EP1S25F1020C6N por Altera y EP1S30F1020C7N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP1S25F1020C6N | EP1S30F1020C7N |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $450,00 | $215,00 |
| Family | Stratix | Stratix (1.5 V core) |
| Logic Elements (LE) | 25,660 | — |
| Logic Cells | 25,660 | — |
| Embedded Memory (bits) | 1,944,576 | — |
| User I/O Pins | 706 | — |
| LABs (Logic Array Blocks) | 2,566 | 3247 |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| Core Supply Voltage (VCCINT) | 1.5 V | — |
| Encapsulado | 1020-ball FC-FBGA (33 x 33 mm, 1.0 mm pitch) | — |
| Maximum Internal Clock Frequency | 450.05 MHz | — |
| Temperatura de funcionamiento | 0C to +85C (Commercial) | 0 C to +85 C (commercial extended) |
| Tipo de montaje | Surface Mount | Surface Mount (BGA) |
| Estado RoHS | [DATA_NEEDED: RoHS status] | Compliant |
| Configuration Method | JTAG or EPC configuration device | — |
| Family Generation | Stratix (1st generation) | — |
| Series | — | Stratix |
| Logic Elements | — | 32,470 |
| Total Block RAM Bits | — | 3,317,184 |
| User I/O Count | — | 726 |
| Max Internal Frequency | — | 420.17 MHz |
| Core Supply Voltage | — | 1.5 V (1.425 V to 1.575 V) |
| Package Type | — | 1020-ball FineLine BGA (FC-FBGA) |
| Package Dimensions | — | 33 x 33 mm |
| Ball Pitch | — | 1.0 mm |
| Nivel MSL | — | 3 (168 hours) |
| Peak Reflow Temperature Max Time | — | 40 s |