EP1S60F1020C6NGB vs EP1S60F1020C6N Comparación
Comparación detallada lado a lado de EP1S60F1020C6NGB por Intel y EP1S60F1020C6N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP1S60F1020C6NGB | EP1S60F1020C6N |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $171,00 | $195,00 |
| Family | Stratix | Stratix (EP1S) |
| Logic Elements (LE) | 57,120 | — |
| System Gates | ~5,215,104 | — |
| Maximum User I/O | 773 | — |
| Embedded Memory | [DATA_NEEDED: TriMatrix block RAM in Mbits] | — |
| DSP Blocks | 18 | — |
| Embedded Multipliers | [DATA_NEEDED: 9-bit equivalent multiplier count] | 773 (18x18) |
| PLLs | 12 | — |
| Encapsulado | 1020-ball FBGA | — |
| Package Dimensions | 33 x 33 mm, 1.0 mm pitch | — |
| Process Technology | 0.13 µm CMOS | — |
| Speed Grade | -6 (commercial) | C6 (mid-tier) |
| Temperatura de funcionamiento | 0 °C to 85 °C (commercial) | 0°C to +85°C (Commercial) |
| Supply Voltage Core (VCCINT) | [DATA_NEEDED: nominal VCCINT] | — |
| I/O Standard Support | LVTTL, LVCMOS, LVDS, SSTL, HSTL | — |
| Tipo de montaje | Surface Mount (BGA) | Surface Mount (BGA) |
| Estado RoHS | [DATA_NEEDED] | Compliant (per 'N' suffix) |
| Lead-Free | [DATA_NEEDED] | — |
| Series | — | Stratix |
| Logic Elements (LEs) | — | 57,120 |
| Logic Cells | — | 6,570 blocks (per chipdig datasheet summary) |
| Embedded RAM (Total Bits) | — | 5,215,104 bits |
| Maximum User I/O Pins | — | Per datasheet, package-dependent (F1020 variant) |
| Package Type | — | 1020-ball FBGA (FineLine BGA), 33 x 33 mm, 1 mm pitch |
| Logic Family / Process | — | CMOS, 0.13 µm |
| Tensión de alimentación | — | Per datasheet (Stratix Device Handbook Vol. 1) |
| Lead-Free / Pb-Free | — | Yes (suffix 'N') |
| Nivel MSL | — | [DATA_NEEDED: MSL rating] |
| Configuration | — | JTAG / Passive Serial / Fast Passive Parallel via MSEL pins |
| PLL Count | — | 12 (per Stratix family datasheet) |
| Memory Block Types | — | TriMatrix (M512, M4K, M-RAM) |