EP1S60F1020C7N vs EP1S60F1020C6N Comparación
Comparación detallada lado a lado de EP1S60F1020C7N por Intel y EP1S60F1020C6N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP1S60F1020C7N | EP1S60F1020C6N |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $1.580,00 | $195,00 |
| Series | Stratix | Stratix |
| Family | Stratix (EP1S) | Stratix (EP1S) |
| Logic Elements (LE) | 57120 | — |
| Logic Array Blocks (LABs) | 5712 | — |
| Embedded Memory (bits) | 5,215,104 | — |
| Maximum User I/O | 773 | — |
| Encapsulado | 1020-ball FC-FBGA | — |
| Package Size | 33 mm x 33 mm, 1.0 mm pitch | — |
| Process Technology | 130 nm CMOS | — |
| Core Supply Voltage | 1.5 V | — |
| Temperatura de funcionamiento | 0 °C to 85 °C (Commercial) | 0°C to +85°C (Commercial) |
| Speed Grade | C7 | C6 (mid-tier) |
| Maximum Internal Frequency | 420.17 MHz | — |
| Embedded PLLs | 6 | — |
| DSP Blocks (18x18 multipliers) | Yes | — |
| Configuration Modes | PS, PPS, PPA, JTAG | — |
| Estado RoHS | [DATA_NEEDED: rohs status] | Compliant (per 'N' suffix) |
| Tipo de montaje | Surface Mount | Surface Mount (BGA) |
| Logic Elements (LEs) | — | 57,120 |
| Logic Cells | — | 6,570 blocks (per chipdig datasheet summary) |
| Embedded RAM (Total Bits) | — | 5,215,104 bits |
| Embedded Multipliers | — | 773 (18x18) |
| Maximum User I/O Pins | — | Per datasheet, package-dependent (F1020 variant) |
| Package Type | — | 1020-ball FBGA (FineLine BGA), 33 x 33 mm, 1 mm pitch |
| Logic Family / Process | — | CMOS, 0.13 µm |
| Tensión de alimentación | — | Per datasheet (Stratix Device Handbook Vol. 1) |
| Lead-Free / Pb-Free | — | Yes (suffix 'N') |
| Nivel MSL | — | [DATA_NEEDED: MSL rating] |
| Configuration | — | JTAG / Passive Serial / Fast Passive Parallel via MSEL pins |
| PLL Count | — | 12 (per Stratix family datasheet) |
| Memory Block Types | — | TriMatrix (M512, M4K, M-RAM) |