EP1S60F1020C7N vs EP1S60F1020C7 Comparación
Comparación detallada lado a lado de EP1S60F1020C7N por Intel y EP1S60F1020C7 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP1S60F1020C7N | EP1S60F1020C7 |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $1.580,00 | $1.750,00 |
| Series | Stratix | Stratix |
| Family | Stratix (EP1S) | Stratix (EP1S60) |
| Logic Elements (LE) | 57120 | — |
| Logic Array Blocks (LABs) | 5712 | — |
| Embedded Memory (bits) | 5,215,104 | — |
| Maximum User I/O | 773 | 773 |
| Encapsulado | 1020-ball FC-FBGA | 1020-BBGA, FCBGA, 33 x 33 mm, 1.0 mm pitch |
| Package Size | 33 mm x 33 mm, 1.0 mm pitch | — |
| Process Technology | 130 nm CMOS | — |
| Core Supply Voltage | 1.5 V | 1.5 V |
| Temperatura de funcionamiento | 0 °C to 85 °C (Commercial) | 0C to +85C (Commercial) |
| Speed Grade | C7 | 7 |
| Maximum Internal Frequency | 420.17 MHz | — |
| Embedded PLLs | 6 | — |
| DSP Blocks (18x18 multipliers) | Yes | — |
| Configuration Modes | PS, PPS, PPA, JTAG | — |
| Estado RoHS | [DATA_NEEDED: rohs status] | Compliant (lead-free) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Logic Elements | — | 57,120 |
| Total Memory Bits | — | 5,215,104 |
| Logic Family | — | CMOS |
| Logic Cells / Logic Blocks | — | 6,570 (per datasheet Section I nomenclature) |
| DSP Blocks | — | Embedded dedicated multiplier / adder blocks |
| PLLs | — | Up to 12 enhanced PLLs per die |
| Configuration Method | — | Serial or parallel with optional decompression |
| Nivel MSL | — | 3 (per BGA moisture-sensitivity norms) |