EP1SGX25DF800C5N vs EP1SGX25DF1020C5N Comparación
Comparación detallada lado a lado de EP1SGX25DF800C5N por Intel y EP1SGX25DF1020C5N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP1SGX25DF800C5N | EP1SGX25DF1020C5N |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $158,00 | $650,00 |
| Family | Stratix GX | Stratix GX |
| Device Logic Elements | 25,660 (typical) | — |
| Transceiver Channels | 8 (full-duplex) | — |
| Maximum Transceiver Data Rate | 3.1875 Gbps per channel | — |
| Process Technology | 130 nm | — |
| Supply Voltage (Core) | 1.5 V typical | — |
| Encapsulado | FBGA-800 (FineLine BGA, 31x31 mm) | — |
| Speed Grade | C5 (commercial) | C5 |
| Temperatura de funcionamiento | 0C to +85C (commercial) | 0 C to 85 C (commercial) |
| Lead-Free / RoHS Status | Lead-free (N suffix) | — |
| On-Chip Memory (TriMatrix) | Approx. 2 Mbits total | — |
| PLLs | Up to 40 (device-wide) | — |
| Embedded 8b/10b Encoder/Decoder | Yes (one per transceiver channel) | — |
| PCI Express Hard IP | x1, x4 endpoints supported | — |
| DSP Blocks | Embedded multiplier blocks (family-wide) | — |
| Tipo de montaje | Surface Mount (BGA) | Surface Mount (BGA) |
| Nivel MSL | [DATA_NEEDED: MSL Level] | — |
| Development Software | Quartus II (legacy) | — |
| Logic Elements (LEs) | — | 25,660 |
| Total RAM Bits | — | 1,944,576 |
| User I/O Pins | — | 607 |
| Número de pines | — | 1020 |
| Package Type | — | 1020-BBGA (FineLine BGA), 33 x 33 mm, 1.0 mm pitch |
| Core Supply Voltage | — | 1.5 V |
| Logic Family | — | CMOS |
| Lead Free | — | Yes |
| Estado RoHS | — | Compliant |
| Sub-family | — | EP1SGX25 |
| PLL Count | — | 4 (max, family-level) |