EP1SGX25DF800C5N vs EP1SGX25DF800I7N Comparación
Comparación detallada lado a lado de EP1SGX25DF800C5N por Intel y EP1SGX25DF800I7N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
EP1SGX25DF800I7N - 25,660 LEs Stratix GX FPGA, 16 GXB, FBGA-800 | Intel / Altera
EP1SGX25DF800I7N ⚠ Última compraComparación de especificaciones
| Parámetro | EP1SGX25DF800C5N | EP1SGX25DF800I7N |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Última compra |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $158,00 | $215,00 |
| Family | Stratix GX | — |
| Device Logic Elements | 25,660 (typical) | — |
| Transceiver Channels | 8 (full-duplex) | — |
| Maximum Transceiver Data Rate | 3.1875 Gbps per channel | — |
| Process Technology | 130 nm | — |
| Supply Voltage (Core) | 1.5 V typical | — |
| Encapsulado | FBGA-800 (FineLine BGA, 31x31 mm) | FBGA-800 (FineLine BGA) |
| Speed Grade | C5 (commercial) | -7 (industrial) |
| Temperatura de funcionamiento | 0C to +85C (commercial) | -40C to +100C (industrial, 'I' grade) |
| Lead-Free / RoHS Status | Lead-free (N suffix) | — |
| On-Chip Memory (TriMatrix) | Approx. 2 Mbits total | — |
| PLLs | Up to 40 (device-wide) | Up to 12 |
| Embedded 8b/10b Encoder/Decoder | Yes (one per transceiver channel) | — |
| PCI Express Hard IP | x1, x4 endpoints supported | — |
| DSP Blocks | Embedded multiplier blocks (family-wide) | — |
| Tipo de montaje | Surface Mount (BGA) | Surface Mount |
| Nivel MSL | [DATA_NEEDED: MSL Level] | — |
| Development Software | Quartus II (legacy) | — |
| Series | — | Stratix GX |
| Family Name | — | Stratix GX (EP1SGX25) |
| Logic Elements | — | 25,660 |
| Registers | — | 26,274 |
| Embedded Memory | — | 1,944,576 bits |
| GXB Transceiver Channels | — | 16 (max) |
| GXB Data Rate | — | Up to 3.125 Gbps per channel |
| I/O Pins | — | [DATA_NEEDED: I/O pin count] |
| Core Voltage (VCCINT) | — | 1.5 V |
| I/O Standards Supported | — | LVDS, LVTTL, LVPECL, PCI, PCI-X, SSTL, HSTL, 1.5 V PCML/PECL |
| Configuration | — | JTAG or Passive Serial (EPCSxx) |
| Estado RoHS | — | [DATA_NEEDED: RoHS status not in verified data] |