EP20K100BC356-1 vs EP20K100CB356C7ES Comparación
Comparación detallada lado a lado de EP20K100BC356-1 por Intel y EP20K100CB356C7ES por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP20K100BC356-1 | EP20K100CB356C7ES |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $92,75 | $92,00 |
| Series | APEX-20K | — |
| Device Type | Field Programmable Gate Array (FPGA) | — |
| Logic Elements / Cells | 4160 | — |
| Total RAM Bits | 53248 | — |
| User I/O Count | 252 | — |
| Number of Gates | 100000 (typical) | — |
| Propagation Delay | 1.6 ns | — |
| Speed Grade | -1 | C7 |
| Core Supply Voltage | 1.71 V to 1.89 V (1.8 V typical) | — |
| Temperatura de funcionamiento | 0 C to 85 C (commercial) | [DATA_NEEDED: operating temperature range] |
| Package Type | 356-LBGA (Large BGA) | — |
| Package Dimensions | 45 x 45 mm, 1.27 mm pitch | — |
| Tipo de montaje | Surface Mount | Surface Mount (BGA) |
| Process Technology | 0.15 micrometer all-layer copper CMOS | SRAM-based CMOS |
| Configuration Interface | JTAG (IEEE 1149.1), passive serial/parallel | — |
| Estado RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS compliance] |
| Family | — | APEX20K |
| Logic Elements | — | 4,160 |
| Typical Gates | — | 100,000 |
| Maximum System Gates | — | 263,000 |
| Embedded Memory (RAM bits) | — | 53,248 |
| User I/O Pins | — | 252 |
| Encapsulado | — | 356-BGA |
| Core Voltage | — | 1.8 V |
| I/O Voltage Compatibility | — | 2.5 V / 3.3 V |
| Configuration Method | — | JTAG / Passive Serial |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |