EP20K100CQ208C8 vs EP20K100CQ240C8 Comparación
Comparación detallada lado a lado de EP20K100CQ208C8 por Altera y EP20K100CQ240C8 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP20K100CQ208C8 | EP20K100CQ240C8 |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $13,40 | $26,80 |
| Series | APEX 20KE | EP20K100 |
| Logic Elements | 4,160 | 4,160 |
| Typical Gates | 100,000 | 100,000 |
| Maximum System Gates | 263,000 | 263,000 |
| Embedded System Block (ESB) Bits | 53,248 | — |
| Dedicated RAM Bits | 100,000 | — |
| Number of PLLs | 4 | — |
| User I/O Pins | 208 | 189 |
| Encapsulado | 208-PQFP (28x28 mm) | 240-pin PQFP (QFP) |
| Speed Grade | C8 | C8 (commercial, -8) |
| Temperatura de funcionamiento | 0C to +85C (Commercial) | 0C to +85C (commercial) |
| Supply Voltage Core | 1.8 V | — |
| I/O Standard Support | 1.8V / 2.5V / 3.3V / 5.0V LVTTL/LVCMOS, 3.3V PCI | — |
| Configuration Modes | Passive Serial, Passive Parallel Synchronous, Passive Parallel Asynchronous, Boundary-Scan JTAG | — |
| Tipo de montaje | Surface Mount | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Family | — | APEX 20K |
| Embedded Memory (ESB) | — | 53,248 bits |
| Core Voltage | — | 2.5 V |
| I/O Standards | — | LVTTL, LVCMOS, PCI |
| Configuration Interface | — | JTAG (IEEE 1149.1), serial/parallel |
| Programming Method | — | SRAM-based, in-system programmable |