EP20K200BC356-2 vs EP20K200BC356-1 Comparación
Comparación detallada lado a lado de EP20K200BC356-2 por Intel y EP20K200BC356-1 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP20K200BC356-2 | EP20K200BC356-1 |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $88,25 | $335,00 |
| Series | APEX-20K | — |
| Device Family | APEX-20K (MultiCore PLD) | — |
| Logic Elements | 8,320 | — |
| Typical Gate Count | 200,000 gates | — |
| Embedded Memory | 106,496 bits | — |
| User I/Os | 277 | — |
| Logic Family | CMOS | CMOS |
| Process Technology | 0.22 µm | 0.22 um |
| Propagation Delay | 2.5 ns | — |
| Core Supply Voltage | 2.5 V | 2.5 V |
| Temperatura de funcionamiento | 0 °C to +85 °C (commercial) | — |
| Encapsulado | 356-LBGA (35 mm × 35 mm) | — |
| Speed Grade | -2 | — |
| Tipo de montaje | Surface Mount (BGA) | Surface Mount |
| Maximum Frequency | 200 MHz | — |
| Estado RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS/lead finish of original non-N EP20K200BC356-1] |
| Product Function | — | APEX-20K Field Programmable Gate Array (FPGA) |
| Equivalent System Gates | — | 200K gates |
| Logic Elements / Cells | — | 8320 |
| Total RAM Bits | — | 106496 bits |
| Frecuencia de reloj máxima | — | 250 MHz |
| User I/O Count | — | 277 |
| Número de pines | — | 356 |
| Encapsulado / Carcasa | — | 356-LBGA |
| Package Code | — | LBGA |
| Package Shape | — | Square |
| Propagation Delay (tPD) | — | 2.5 ns (from -1N variant listing) |
| Rango de temperatura de funcionamiento | — | 0 to 85 C (commercial, per -1N variant listing) |
| Lead-Free Finish | — | [DATA_NEEDED: original non-N finish not specified; N suffix indicates lead-free] |