EP20K200EFC484-1N vs EP20K200EFC484-2N Comparación
Comparación detallada lado a lado de EP20K200EFC484-1N por Altera y EP20K200EFC484-2N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP20K200EFC484-1N | EP20K200EFC484-2N |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $290,00 | $175,00 |
| Family | APEX-20KE | APEX-20KE |
| Logic Elements | 8,320 | 8,320 |
| System Gates | 200,000 | 200,000 |
| Embedded RAM Bits | 106,496 | — |
| Maximum User I/O | 376 | 376 |
| Core Voltage (VCCINT) | 1.8 V (1.71 V to 1.89 V) | — |
| I/O Voltage (VCCIO) | [DATA_NEEDED: VCCIO range] | — |
| Maximum Internal Frequency | 367 MHz | — |
| Process Technology | 0.22 µm CMOS | 0.22 µm CMOS |
| Propagation Delay | 2.5 ns (per digchip reference) | — |
| Encapsulado | 484-ball FineLine BGA (23 mm × 23 mm) | 484-FBGA (FineLine BGA), 23x23 mm, 1.0 mm pitch |
| Temperatura de funcionamiento | 0 °C to +85 °C (commercial) | 0 °C to +85 °C (Commercial) |
| Speed Grade | -1 | -2 |
| Programming Interface | IEEE 1149.1 JTAG | — |
| Tipo de montaje | Surface Mount (BGA) | Surface Mount (BGA) |
| Nivel MSL | [DATA_NEEDED: MSL rating] | — |
| Estado RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| Product Type | — | FPGA - Field Programmable Gate Array |
| Total RAM Bits | — | 106,496 |
| Embedded System Blocks (ESB) | — | 52 (True Dual-Port RAM) |
| Core Voltage | — | 1.8 V |
| Supply Voltage Range | — | 1.71 V to 1.89 V |
| Logic Family | — | CMOS |
| Propagation Delay (typ.) | — | 2.5 ns |
| Configuration Modes | — | Passive Serial, Passive Parallel Async, JTAG |
| PLLs | — | 4 |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |