EP20K200RC208-2 vs EP20K200RC208-3V Comparación
Comparación detallada lado a lado de EP20K200RC208-2 por Altera y EP20K200RC208-3V por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP20K200RC208-2 | EP20K200RC208-3V |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | NRND | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $79,67 | $0,00 |
| Series | APEX-20K | APEX-20K |
| Family | APEX-20K MultiCore FPGA | — |
| Logic Elements (LEs) | 8320 | — |
| System Gates | 200,000 (typical) | — |
| Embedded Memory (bits) | 106,496 | — |
| Maximum User I/O | 144 | — |
| Encapsulado | 208-BQFP / 208-RQFP with Exposed Pad | — |
| Recuento de pines | 208 | — |
| Speed Grade | -2 (mid-speed, industrial) | [DATA_NEEDED: exact speed grade suffix interpretation] |
| Temperatura de funcionamiento | -40C to +85C (industrial) | — |
| Supply Voltage (Core) | [DATA_NEEDED: core VCC] | — |
| Supply Voltage (I/O) | 3.3 V (multi-standard I/O) | — |
| Configuration Interface | JTAG (IEEE 1149.1) + Altera legacy scheme | [DATA_NEEDED: configuration interface details] |
| Process Technology | [DATA_NEEDED: process node] | 0.22 um |
| Tipo de montaje | Surface Mount | Surface Mount |
| Nivel MSL | [DATA_NEEDED: MSL rating] | — |
| Estado RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Number of Logic Elements / Cells | — | 8320 |
| Number of Gates | — | 200000 typical |
| Total RAM Bits | — | 106496 |
| Number of User I/Os | — | 144 |
| Supply Voltage Range | — | 2.375 V to 2.625 V |
| Maximum Internal Frequency | — | 167 MHz |
| Encapsulado / Carcasa | — | 208-BFQFP Exposed Pad |
| Supplier Device Package | — | 208-RQFP (28x28) |
| Número de pines | — | 208 |
| Core Architecture | — | MultiCore, combining LUT logic, product-term logic, and embedded memory |
| Interconnect | — | Four-level hierarchical FastTrack Interconnect |
| Rango de temperatura de funcionamiento | — | [DATA_NEEDED: operating temperature range] |
| Core Supply Current | — | [DATA_NEEDED: core supply current] |