EP20K300EBC652-2 vs EP20K200EBC652-2X Comparación
Comparación detallada lado a lado de EP20K300EBC652-2 por Altera y EP20K200EBC652-2X por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP20K300EBC652-2 | EP20K200EBC652-2X |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Unknown | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $384,08 | $195,00 |
| Product Type | Field Programmable Gate Array (FPGA) | — |
| Device Family | APEX-20KE | — |
| Logic Cells | 11520 | — |
| Macros | 1152 | — |
| Total RAM Bits | 147456 bits | 106,496 |
| I/O Count | 408 | — |
| Tensión de alimentación | 1.71 V to 1.89 V | — |
| Encapsulado | 652-BGA | 652-BGA |
| Package Dimensions | 45 mm x 45 mm | — |
| Technology | 0.22 um (reported for family variant) | — |
| Frecuencia de reloj máxima | 350 MHz (reported for family variant) | — |
| Configuration Technology | SRAM-based programmable logic (family description) | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | — |
| Estado RoHS | unknown | — |
| REACH Status | unknown | — |
| AEC-Q100 Qualification | unknown | — |
| Series | — | APEX-20KE® |
| Family | — | APEX-20KE |
| Device Logic Elements | — | 8,320 |
| Number of LABs/CLBs | — | 832 |
| Number of I/O Pins | — | 376 |
| Number of Gates | — | 200,000 (typical) |
| Core Supply Voltage | — | 1.71 V to 1.89 V (1.8 V nominal) |
| Operating Temperature (TJ) | — | 0C to +85C |
| Process Technology | — | 0.18 um CMOS |
| I/O Standard Support | — | LVTTL, LVCMOS, LVDS, PCI, GTL+, SSTL |
| Configuration Method | — | Serial or Parallel PROM, JTAG (IEEE 1149.1) |
| Lead-Free / RoHS | — | Compliant (per DigiKey listing) |