EP20K300EQI240-3N vs EP20K300EQI240-2X Comparación
Comparación detallada lado a lado de EP20K300EQI240-3N por Altera y EP20K300EQI240-2X por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP20K300EQI240-3N | EP20K300EQI240-2X |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $97,20 | $0,00 |
| Family | APEX 20KE | — |
| Series | EP20K300 | APEX-20KE |
| System Gates | 300,000 | — |
| Logic Elements | 11,520 | — |
| Embedded Memory (bits) | 147,456 | — |
| Maximum User I/O | 152 | — |
| Dedicated Inputs | 4 | — |
| Encapsulado | 240-pin BQFP/PQFP (PowerQuad Flat Pack) | — |
| Process Technology | 0.22 µm CMOS | 0.22 um |
| Core Supply Voltage | 1.8 V nominal (1.71 V min, 1.89 V max) | 1.71 V to 1.89 V |
| I/O Standard Support | 1.5 V, 1.8 V, 2.5 V, 3.3 V (multi-volt I/O) | — |
| Temperatura de funcionamiento | -40 °C to +105 °C (industrial 'I' grade) | — |
| Speed Grade | -3 | -2 (from ordering code) |
| Estado RoHS | [DATA_NEEDED: RoHS compliance from data] | unknown |
| Programming Interface | IEEE 1149.1 JTAG (ByteBlaster / MasterBlaster) | — |
| Number of Gates | — | 728000 |
| Number of Logic Elements/Cells | — | 11520 |
| Number of LABs/CLBs | — | 1152 |
| Total RAM Bits | — | 147456 |
| Number of User I/Os | — | 152 |
| I/O Supply Voltage | — | [DATA_NEEDED: I/O supply voltage] |
| Rango de temperatura de funcionamiento | — | -40C to 100C (TJ) |
| Maximum Internal Frequency | — | 350 MHz (per archived FPGAkey listing) |
| Propagation Delay | — | 2.29 ns (per FindIC listing) |
| Encapsulado / Carcasa | — | 240-BFQFP |
| Package Code | — | FQFP |
| Número de pines | — | 240 |
| Terminal Form | — | Gull Wing |
| Package Shape | — | Square |
| Tipo de montaje | — | Surface Mount |
| Logic Family | — | CMOS |
| Lead-Free Finish | — | unknown |