EP20K30EFC144-3 vs EP20K60EFC144-1 Comparación
Comparación detallada lado a lado de EP20K30EFC144-3 por Altera y EP20K60EFC144-1 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP20K30EFC144-3 | EP20K60EFC144-1 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $10,40 | $19,40 |
| Series | APEX-20K | APEX 20K |
| Family | APEX-20K FPGA | — |
| Logic Elements / Cells | 1200 | — |
| Total System Gates | 30,000 (typical) | — |
| Total RAM Bits | 24576 | — |
| Number of User I/Os (per pkg) | 92 (144-LQFP) | — |
| User I/Os (max per family) | 408 | — |
| Internal Operating Frequency | 160 MHz | — |
| Propagation Delay | 1.68 ns (typical) | 1.72 ns |
| Logic Family | CMOS | CMOS |
| Process Technology | 0.22 um | — |
| Core Supply Voltage | 1.71 V to 1.89 V | 1.8 V |
| Architecture | MultiCore (LUT + product-term + ESB) | — |
| Encapsulado / Carcasa | 144-LQFP (20x20 mm) | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Temperatura de funcionamiento | 0C to +85C | 0 C to 85 C (Commercial) |
| Speed Grade | -3 | -1 |
| Estado RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: rohs_status] |
| Development Tool (legacy) | Quartus II / MAX+PLUS II | — |
| Device Family | — | APEX 20KE |
| Typical Gates | — | 60,000 |
| Maximum System Gates | — | 256,000 |
| Macrocells | — | 256 |
| Maximum User I/Os | — | 93 (per datasheet; 196 max in 144-FBGA family datasheet) |
| Embedded Memory | — | 32,768 bits (2560 RAM blocks) |
| Maximum Internal Frequency | — | 160 MHz |
| Encapsulado | — | 144-FBGA (Fine-pitch BGA) |
| Package Pin Count | — | 144 balls |
| Programming Interface | — | JTAG / ByteBlaster / Altera Programming Unit |