EP20K30ETC144-3N vs EP20K30ETC144-1X Comparación
Comparación detallada lado a lado de EP20K30ETC144-3N por Altera y EP20K30ETC144-1X por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Altera
EP20K30ETC144-3N - 30K Gates APEX-20KE FPGA, 144-TQFP | Altera/Intel
EP20K30ETC144-3N ⚠ Última compraIntel
EP20K30ETC144-1X - APEX-20KE FPGA, 30K Gates, 92 I/O, 144-LQFP | Intel
EP20K30ETC144-1X ObsoleteComparación de especificaciones
| Parámetro | EP20K30ETC144-3N | EP20K30ETC144-1X |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Última compra | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $21,50 | $21,40 |
| Family | APEX-20KE | APEX 20K |
| Series | APEX 20K | APEX-20KE |
| Logic Elements | 1200 | — |
| System Gates | 30000 | — |
| Embedded RAM Bits | 24576 | — |
| Macrocells | 192 | — |
| User I/Os | 92 | — |
| Encapsulado | 144-pin TQFP (TQFP-144 / ETQFP144) | 144-LQFP (20x20 mm, 0.5 mm pitch) |
| Process Technology | 0.22 µm CMOS | 0.22 µm CMOS |
| Core Voltage | 1.8 V | 1.8 V |
| I/O Voltage Support | 1.8 V / 2.5 V / 3.3 V (MultiVolt I/O) | — |
| Propagation Delay (pin-to-pin) | 1.68 ns (speed grade -3) | — |
| Internal Performance | 435 MHz (per legacy datasheet) | — |
| Temperatura de funcionamiento | 0 °C to +85 °C (commercial, 'N' suffix) | 0 °C to +85 °C (TJ) |
| Tipo de montaje | Surface Mount (gull-wing) | Surface Mount |
| Estado RoHS | Compliant (per legacy Altera declaration) | [DATA_NEEDED: confirm current RoHS compliance vs original leaded LQFP] |
| Lead-Free | Yes | — |
| Typical Gates | — | 30,000 |
| Maximum System Gates | — | 113,000 |
| Number of Logic Elements / Cells | — | 1,200 |
| Number of LABs / CLBs | — | 120 |
| Total RAM Bits | — | 24,576 |
| Number of User I/Os | — | 92 |
| Supply Voltage (Core) | — | 1.71 V to 1.89 V |
| Propagation Delay | — | 1.68 ns (per datasheet graph reference) |
| Internal Frequency (max) | — | 160 MHz (per DigChip datasheet entry) |
| Configuration | — | SRAM-based, in-system programmable |