EP20K400BC652-1V vs EP20K400BC652-1XVQ Comparación
Comparación detallada lado a lado de EP20K400BC652-1V por Altera y EP20K400BC652-1XVQ por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP20K400BC652-1V | EP20K400BC652-1XVQ |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $47,95 | $152,00 |
| Series | APEX-20KC | — |
| Family | APEX 20K | APEX 20K |
| Device Sub-Family | EP20K400 | — |
| System Gates | 1,052,000 | — |
| Maximum Logic Elements | 212,992 | — |
| Macrocells / LABs | 16640 | — |
| Embedded Memory (bits) | 212,992 | — |
| Maximum User I/O | 502 | — |
| Speed Grade | -1 | -1 (slowest) |
| Clock-to-Output (Tco) | 2.5 ns | — |
| Core Voltage (VCCINT) | 1.8 V | — |
| I/O Voltage (VCCIO) | 2.5 V | — |
| Encapsulado | 652-BGA (FineLine, 45 x 45 mm) | 652-ball BGA |
| Tipo de montaje | Surface Mount | Surface Mount |
| Temperatura de funcionamiento | 0C to +85C (commercial) | -40C to +85C (industrial) |
| Configuration | SRAM-based, JTAG IEEE 1149.1 | — |
| Architecture | MultiCore (LUT + product-term + ESB) | — |
| Estado RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS compliance status] |
| Maximum System Gates | — | 1,052,000 |
| Typical Gates | — | 400,000 |
| Logic Elements | — | 21,600 |
| Embedded Memory Bits | — | 212,992 |
| Maximum User I/O Pins | — | 488 |
| Supply Voltage Core | — | 1.8 V |
| I/O Standard Support | — | LVDS, LVTTL, LVCMOS, PCI, HSTL, SSTL |
| Configuration Interface | — | JTAG (IEEE 1149.1) |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |