EP20K400CF672I7N vs EP20K400CF672C7N Comparación
Comparación detallada lado a lado de EP20K400CF672I7N por Intel y EP20K400CF672C7N por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP20K400CF672I7N | EP20K400CF672C7N |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $620,00 | $160,00 |
| Family | APEX 20KC | APEX 20KC |
| Number of Logic Elements / Cells | 16640 | — |
| Number of LABs/CLBs | 502 | — |
| Total RAM Bits | 212992 | — |
| System Gates | 400000 | — |
| Maximum Operating Frequency | 375.94 MHz | — |
| Process Technology | 0.15 µm CMOS | 0.18-micron CMOS, all-layer copper interconnect |
| Core Supply Voltage (VCCINT) | 1.8 V | — |
| I/O Supply Voltage (VCCIO) | 1.8 V / 3.3 V | — |
| Encapsulado | 672-ball FC-FBGA (Flip-Chip Fine-pitch BGA) | 672-ball FineLine BGA (FC-FBGA / BBGA) |
| Tipo de montaje | Surface Mount | Surface Mount (BGA) |
| Nivel de sensibilidad a la humedad (MSL) | 3 | — |
| Terminal Finish | Tin/Lead (Sn/Pb) | — |
| JESD-609 Code | e0 | — |
| Operating Temperature (industrial, I7) | -40C to +100C | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status not in provided data] |
| Maximum System Gates | — | 1,052,000 |
| Typical Gates | — | 400,000 |
| Logic Elements (LEs) | — | 16,640 |
| Embedded Memory | — | 488 Kbits |
| Maximum User I/O | — | 488 |
| User I/O (per catalog) | — | 480 / 502 (per source) |
| Core Voltage (VCCINT) | — | 1.8 V |
| I/O Voltage (VCCIO) | — | 3.3 V / 2.5 V banked |
| Propagation Delay | — | 2.5 ns (catalog) / 1.48 ns (some catalog) |
| Maximum Frequency | — | 375.94 MHz (internal) |
| Temperatura de funcionamiento | — | 0 C to 85 C (Commercial) |
| Nivel MSL | — | 3 (per JEDEC J-STD-020) |
| Configuration Modes | — | PS, PPS, JTAG |