EP20K400EFC672-1N vs EP20K400EFC672-3N Comparación
Comparación detallada lado a lado de EP20K400EFC672-1N por Intel y EP20K400EFC672-3N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP20K400EFC672-1N | EP20K400EFC672-3N |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $175,00 | $171,00 |
| Family | APEX 20KE | APEX 20KE |
| Logic Elements / Cells | 16,640 | — |
| System Gates | 400,000 | 1,052,000 |
| User I/Os | 502 (488 per Mouser listing) | — |
| Encapsulado | 672-ball FC-FBGA | 672-BBGA (FC-FBGA) |
| Process Technology | 0.22 µm CMOS | — |
| Core Supply Voltage (VCCINT) | 1.8 V | — |
| I/O Supply Voltage (VCCIO) | 2.5 V | — |
| Maximum Core Frequency | 368 MHz | — |
| Propagation Delay | 2.5 ns | 2.5 ns |
| Temperatura de funcionamiento | 0 °C to 85 °C (industrial) | 0 °C to +85 °C (commercial) |
| Architecture | MultiCore (LUT + product-term + EAB) | MultiCore (LUT + Embedded System Blocks) |
| PLLs | 4 | — |
| Configuration Interface | JTAG (IEEE 1149.1) | — |
| Tipo de montaje | Surface Mount | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: specific RoHS status - likely non-compliant given part age] |
| Series | — | APEX 20K |
| Device Type | — | FPGA - Field Programmable Gate Array |
| Logic Elements | — | 16,640 |
| Logic Array Blocks (LABs) | — | 1,664 macros |
| Embedded RAM (EAB/ESB bits) | — | 212,992 bits |
| User I/O Pins | — | 488 |
| Recuento de pines | — | 672 |
| Core Supply Voltage | — | 1.71 V to 1.89 V (1.8 V nominal) |
| I/O Supply Voltage | — | 2.5 V |
| Speed Grade | — | -3 |
| Technology | — | CMOS, 0.18 µm (per APEX 20KE family) |
| PLL Count | — | 4 |