EP20K400FI672-2 vs EP20K400EFC672-3 Comparación
Comparación detallada lado a lado de EP20K400FI672-2 por Altera y EP20K400EFC672-3 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Altera
EP20K400FI672-2 - 400K Gates APEX-20K FPGA, 502 I/O, 672-FBGA | Altera
EP20K400FI672-2 ObsoleteComparación de especificaciones
| Parámetro | EP20K400FI672-2 | EP20K400EFC672-3 |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $92,40 | $199,50 |
| Family | APEX-20K | — |
| Logic Elements | 16640 | 16,640 (approx. 1,052,000 system gates) |
| Maximum Gates | 400,000 gates | — |
| User I/Os | 502 | 488 |
| Embedded Memory Bits | 212992 | — |
| Number of Macros | 1664 | — |
| Process Technology | 0.22 µm CMOS | — |
| Core Supply Voltage | 2.5 V | — |
| Maximum Internal Frequency | 200 MHz | — |
| Propagation Delay | 2.5 ns | 2.5 ns |
| Temperatura de funcionamiento | 0 °C to +85 °C (Commercial) | 0 C to +85 C (commercial) |
| Package Type | 672-pin Fine-pitch Ball Grid Array (FBGA/FCBGA) | — |
| PLLs (Phase-Locked Loops) | 4 | — |
| Configuration Modes | JTAG, Passive Serial, Passive Parallel | — |
| Estado RoHS | Lead-free / RoHS Compliant | [DATA_NEEDED: RoHS status] |
| Tipo de montaje | Surface Mount (BGA) | Surface Mount |
| Product Type | — | FPGA (Field Programmable Gate Array) |
| Series | — | APEX-20KE |
| Embedded Memory (bits) | — | 212,992 |
| Maximum User I/O | — | 488 pins |
| Core Voltage (VCCINT) | — | 1.8 V |
| I/O Voltage (VCCIO) | — | 2.5 V (multi-voltage I/O) |
| Speed Grade | — | -3 (fastest commercial) |
| Encapsulado | — | 672-ball FineLine BGA |
| Logic Family | — | CMOS |