EP20K400GC655-2 vs EP20K400GI655-1 Comparación
Comparación detallada lado a lado de EP20K400GC655-2 por Altera y EP20K400GI655-1 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP20K400GC655-2 | EP20K400GI655-1 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $80,00 | $195,00 |
| Series | APEX-20KC | — |
| Family | APEX 20K | APEX 20K |
| Device Type | FPGA (Field Programmable Gate Array) | — |
| System Gates | 400,000 | — |
| Logic Cells / Elements | 16,640 | — |
| Total RAM Bits | 212,992 | — |
| Maximum Internal Frequency | 200 MHz | — |
| Speed Grade | -2 | — |
| Process Technology | 0.22 µm CMOS | — |
| Core Supply Voltage | 2.5 V | — |
| I/O Supply Voltage | 1.71 V to 1.89 V (MultiVolt) | — |
| LVDS Support | Yes | — |
| PLLs | 4 | — |
| Recuento de pines | 655 | — |
| Package Type | 655-BCPGA (CPGA-655) | Ceramic Pin Grid Array (CPGA-655) |
| Package Dimensions | 62.48 x 62.48 mm | — |
| Tipo de montaje | Through-Hole (CPGA) | — |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | -40C to +85C (Industrial) |
| Estado RoHS | [DATA_NEEDED: RoHS compliance status] | Compliant |
| Device Series | — | EP20K400 |
| Technology | — | CMOS, SRAM-based |
| Logic Elements | — | 16640 |
| Typical Gates | — | 400000 |
| Maximum User I/O | — | 502 |
| Dedicated Inputs | — | 4 |
| Total Terminals | — | 655 |
| Propagation Delay | — | 2.5 ns |
| JESD-30 Package Code | — | S-CPGA-P655 |
| Moisture Sensitivity Level | — | MSL 1 |
| Peak Reflow Temperature | — | 220 C |
| Programmability | — | In-system, JTAG boundary-scan (IEEE 1149.1) |
| Process Node | — | 0.18 micrometer CMOS |