EP20K400GC655-3X vs EP20K400GC655-1X Comparación
Comparación detallada lado a lado de EP20K400GC655-3X por Altera y EP20K400GC655-1X por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP20K400GC655-3X | EP20K400GC655-1X |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $65,00 | $193,04 |
| Series | APEX-20KC | — |
| Family | APEX 20K (MultiCore architecture, LUT + product-term + embedded memory) | — |
| Manufacturer | Altera (now Intel FPGA) | — |
| Logic Elements / Cells | 16,640 | — |
| System Gates | 400,000 | — |
| Total RAM Bits | 212,992 bits | — |
| Maximum Internal Frequency | 167 MHz (speed grade -3) | — |
| Process Technology | 0.22 µm CMOS | 0.22 um |
| Core Supply Voltage (VCCINT) | 1.71 V to 1.89 V | — |
| I/O Supply Voltage (VCCIO) | 2.5 V (LVDS support per APEX 20KE datasheet) | — |
| Encapsulado / Carcasa | 655-BCPGA (CPGA655, 62.48 x 62.48 mm) | — |
| Tipo de montaje | Through-Hole (CPGA, ceramic) | — |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | — |
| Speed Grade | -3 (fastest) | — |
| Suffix Code | -X (extended / ceramic CPGA variant) | — |
| I/O Count | [DATA_NEEDED: max user I/O] | — |
| JTAG / Boundary Scan | IEEE 1149.1 (per APEX 20K family) | — |
| Estado RoHS | [DATA_NEEDED: RoHS status - ceramic CPGA historically non-RoHS] | unknown |
| Product Family | — | Altera APEX 20K |
| Device Type | — | Field Programmable Gate Array (FPGA) |
| Technology | — | CMOS |
| Gate Count | — | 400K gates |
| Logic Elements | — | 16640 cells |
| Maximum System Frequency | — | 250 MHz |
| Propagation Delay | — | 2.5 ns |
| Core Supply Voltage | — | 2.5 V |
| I/O Supply Voltage | — | 2.5 V / 3.3 V |
| Number of User I/O | — | 496 |
| Number of Dedicated Inputs | — | 6 |
| Number of Terminals | — | 655 |
| Package Type | — | CPGA-655 (Ceramic Pin Grid Array) |
| Package Body Material | — | Ceramic |
| Rango de temperatura de funcionamiento | — | [DATA_NEEDED: operating temperature range] |
| Embedded RAM Bits | — | [DATA_NEEDED: embedded RAM bits] |