EP20K400GI655-1V vs EP20K400GC655-3 Comparación
Comparación detallada lado a lado de EP20K400GI655-1V por Intel y EP20K400GC655-3 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
EP20K400GI655-1V - APEX 20K 400K Gate FPGA, 655-pin CBGA | Intel
EP20K400GI655-1V ⚠ Última compra
Comparación de especificaciones
| Parámetro | EP20K400GI655-1V | EP20K400GC655-3 |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Última compra | Última compra |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $155,00 | $310,00 |
| Family | APEX 20K | APEX 20K |
| Typical Gates | 400,000 | — |
| Logic Elements | 16,640 | 16640 |
| Maximum User I/O | 502 | — |
| Dedicated Inputs | 4 | — |
| Package Type | CBGA-655 (Ceramic Ball Grid Array) | — |
| Package Code (JESD-30) | S-CPGA-P655 | — |
| Package Equivalence Code | SPGA655, 47x47 | — |
| Process Technology | CMOS | 0.22 um CMOS |
| Propagation Delay | 2.5 ns | — |
| Core Supply Voltage | 2.5 V | — |
| I/O Supply Voltage | 2.5 V / 3.3 V | — |
| Configuration | In-system programmable via JTAG | — |
| Boundary Scan | IEEE 1149.1 JTAG | — |
| Temperatura de funcionamiento | [DATA_NEEDED: industrial vs military grade] | -40C to +85C (industrial) |
| Nivel MSL | 1 | — |
| Package Body Material | Ceramic | — |
| Estado RoHS | [DATA_NEEDED] | [DATA_NEEDED: rohs status] |
| Series | — | APEX-20KC |
| Manufacturer | — | Intel (formerly Altera) |
| Total RAM Bits | — | 212992 |
| Number of Gates | — | 400000 |
| Supply Voltage - Core | — | 1.71 V to 1.89 V (1.8 V nominal) |
| I/O Voltage Tolerance | — | MultiVolt I/O: 1.8 V / 2.5 V / 3.3 V / 5 V |
| Maximum Frequency | — | 167 MHz (per FPGAkey) |
| Encapsulado / Carcasa | — | 655-BCPGA |
| Supplier Device Package | — | 655-CPGA (62.48 x 62.48 mm) |
| Speed Grade | — | -3 (slowest grade in family) |
| Propagation Delay (tPD) | — | 3.6 ns (per Microchip USA listing) |
| JTAG Support | — | IEEE 1149.1 Boundary-Scan |
| Configuration Modes | — | Passive Serial, Passive Parallel Sync/Async, Active Serial |