EP20K600CB672C8N vs EP20K600CF672C-8 Comparación
Comparación detallada lado a lado de EP20K600CB672C8N por Intel y EP20K600CF672C-8 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Altera
EP20K600CF672C-8 - APEX 20KC FPGA 600K Gates 24320 LEs 672-BGA | Intel / Altera
EP20K600CF672C-8 ObsoleteComparación de especificaciones
| Parámetro | EP20K600CB672C8N | EP20K600CF672C-8 |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $69,00 | $1.150,00 |
| Family | APEX-20KC | — |
| Logic Elements (LEs) | 24,320 | 24,320 |
| Embedded Memory Bits | 311,296 | 311,296 |
| Maximum User I/O | 508 | — |
| Encapsulado | 672-BBGA (FineLine BGA) | — |
| Configuration Memory | SRAM, in-system programmable | — |
| Configuration Schemes | Passive Serial / Active Serial / JTAG (IEEE 1149.1) | — |
| Core Voltage (VCCINT) | 2.5 V | — |
| I/O Voltage (VCCIO) | 1.8 V / 2.5 V / 3.3 V (MultiVolt) | — |
| Process Technology | 0.18 µm CMOS | 0.15 micrometer all-layer copper-metal |
| Temperatura de funcionamiento | Commercial (0C to +85C) | — |
| Speed Grade | C8 | -8 |
| PCI Support | PCI-SIG compliant 3.3 V, 33/66 MHz, 32/64-bit | — |
| External Memory Interface | DDR SDRAM, ZBT SRAM | — |
| Dedicated Clock Inputs | 16 | — |
| PLLs | On-chip with clock-doubling and phase-shift | — |
| LVDS Channels | Up to 32 | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Tipo de montaje | Surface Mount (BGA) | — |
| Series | — | APEX 20KC |
| Device Type | — | FPGA (Field Programmable Gate Array) |
| Typical Gates | — | 600,000 |
| Maximum User I/Os | — | 508 |
| Número de pines | — | 672 |
| Package Type | — | 672-BGA (FineLine BGA, 1.27 mm pitch, 45 x 45 mm) |
| Propagation Delay (tPD) | — | 1.48 ns |
| Architecture | — | MultiCore (LUT logic + embedded memory) |
| Rango de temperatura de funcionamiento | — | 0C to +85C (commercial) |
| Tensión de alimentación | — | Multi-rail (core + I/O banks) |
| Configuration Method | — | Serial / parallel / JTAG |
| Pin Compatibility | — | Pin-compatible with APEX 20KE family |