EP20K600CF33C7N vs EP20K600CF33C9 Comparación
Comparación detallada lado a lado de EP20K600CF33C7N por Intel y EP20K600CF33C9 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
EP20K600CF33C7N - APEX 20KC FPGA, 600K Gates, 1020-FBGA | Intel/Altera
EP20K600CF33C7N Obsolete
Comparación de especificaciones
| Parámetro | EP20K600CF33C7N | EP20K600CF33C9 |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $110,00 | $171,00 |
| Series | APEX-20K | — |
| Family | APEX 20KC | APEX 20KC |
| Logic Elements / Cells | 24320 | 24,320 |
| Total Gates | 600000 | — |
| Total RAM Bits | 311296 | — |
| Number of I/O | [DATA_NEEDED: number of user I/O] | — |
| Number of PLLs | 4 | — |
| Pin-to-Pin Logic Delay (tPD) | 1.48 ns | — |
| Max Operating Frequency | 375.94 MHz | — |
| Process Technology | 0.15 µm CMOS | 0.15 µm CMOS |
| Core Supply Voltage (VCCINT) | 1.8 V (1.71 V to 1.89 V) | 1.8 V nominal (1.71 V to 1.89 V) |
| Supplier Device Package | 1020-FBGA (33 x 33 mm) | — |
| Encapsulado / Carcasa | 1020-BBGA, FCBGA | — |
| Tipo de montaje | Surface Mount | Surface Mount (BGA) |
| Estado RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: rohs status] |
| Temperatura de funcionamiento | 0 °C to 85 °C (commercial, based on speed grade C7) | — |
| System Gates | — | 600,000 (maximum) |
| Maximum Operating Frequency | — | 250 MHz |
| Frecuencia de reloj máxima | — | 303.03 MHz |
| Propagation Delay | — | 2.0 ns |
| User I/O | — | 588 (4 dedicated inputs + 580 general-purpose I/O) |
| Encapsulado | — | 1020-ball FC-FBGA |
| Rango de temperatura de funcionamiento | — | [DATA_NEEDED: operating temperature range] |
| Embedded RAM | — | Dual-port RAM blocks (per family) |
| Programmability | — | JTAG / IEEE 1149.1 ISP, SRAM-based |
| Nivel MSL | — | [DATA_NEEDED: MSL level] |
| Logic Block Architecture | — | MultiCore (LUT + product-term + embedded memory) |
| I/O Standards Supported | — | LVTTL, LVCMOS, LVDS (per family datasheet) |